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8051 Family
 The 8051 is a subset of the 8052
 The 8031 is a ROM-less 8051
 Add external ROM to it

You lose two ports, and leave only 2 ports for I/O
operations
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Introduction to
8051
MICROCONTROLLER
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8051 Microcontroller
 Intel introduced 8051, developed in the year
1981.
 The 8051 is an 8-bit controller.

D0-D7 DATA LINES
 A0-A15 ADDRESS LINES
 UNIT 4 Syllabus
• Architecture of 8051
• Special Function Registers(SFRs)
• I/O Pins Ports and Circuits {Pin Diagram}
• Instruction set
• Addressing modes
• Assembly language programming

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 General Block Diagram of 8051 5

External Interrupts

Interrupt 4K 256 B Timer 0

Control ROM RAM Timer 1
Counter
Inputs

8bit
CPU

Bus Serial
OSC 4 I/O Ports
Control Port

TXD RXD
P0 P1 P2 P3
 8051 Features 6

 8 bit CPU
 On-chip clock oscillator
 4K bytes of on-chip Program Memory-ROM
 128 bytes of on-chip Data RAM
 64KB Program Memory address space
 64KB Data Memory address space
 32 bidirectional I/0 lines (Port 0,1,2,3)
Port 0 { P0.0-P0.7 } – 8 pins
Port 1 { P1.0-P1.7 } – 8 pins
Port 2 { P2.0-P2.7 } – 8 pins
Port 3 { P3.0-P3.7 } – 8 pins
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 Two 16-bit timer/counters(Timer 1,Timer 0)
 One serial port
UART(Universal Asynchronous Receiver Transmitter)
 6-source interrupt structure
1. External interrupt INT0
2. Timer interrupt T0
3. External interrupt INT1
4. Timer interrupt T1
5. Serial communication interrupt
6. Timer Interrupt T2

4 Register Banks (Bank 0, Bank 1, Bank 2, Bank 3)
each bank has R0-R7 registers
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Pin Description
of the 8051
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Pin Diagram of the 8051 / IO ports

 EA/VPP
 EA, “external access’’

  EA = 0, 8051 microcontroller access from

external program memory (ROM) only.

 EA = 1, then it access internal and external

program memories (ROMS). 

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 I/O Port Pins
 The four 8-bit I/O ports

Port 0 { P0.0-P0.7 } – 8 pins

Port 1 { P1.0-P1.7 } – 8 pins
Port 2 { P2.0-P2.7 } – 8 pins
Port 3 { P3.0-P3.7 } – 8 pins

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 Port 3
 Port 3 can be used as input or output.

 Port 3 has the additional function of

providing some extremely important
signals

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 Pin Description Summary
PIN TYPE NAME AND FUNCTION

Vss I Ground: 0 V reference.

Vcc I Power Supply + 5V.

P0.0 - P0.7 I/O Port 0: Port 0 is also the multiplexed low-order address and
data bus during accesses to external program and data
memory.

P1.0 - P1.7 I/O Port 1: Port 1 is an 8-bit bi-directional simple I/O port.

P2.0 - P2.7 I/O Port 2: Port 2 is an 8-bit bidirectional I/O. Port 2 emits the
high order address byte

P3.0 - P3.7 I/O Port 3: Port 3 is an 8 bit bidirectional I/O port. Port 3 also
serves special features as explained.
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 Pin Description Summary
PIN TYPE NAME AND FUNCTION
RST I Reset: resets the device.
ALE O Address Latch Enable:
When ALE=0, it provides data D0-D7
When ALE=1, it has address A0-A7

PSEN* O Program Store Enable:

For External Code Memory, PSEN = 0
For External Data Memory, PSEN = 1

EA*/VPP I External Access Enable/Programming Supply Voltage:

EA = 0, 8051 microcontroller access from external
program memory (ROM) only.
EA = 1, then it access internal and external program
memories (ROMS). 

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Architecture of
8051
microcontroller

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Program Counter(PC) : The program

counter always points to the address of the
next instruction to be executed.
Stack Pointer Register (SP) : It is an 8-bit
register which stores the address of the stack
top.
ALU: perform arithmetic & logical operations
Flags : Carry(C),Auxiliary Carry(AC),
Overflow(O) & Parity(P)
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 Timing & Control: Timing and control unit

synchronises all microcontroller operations
with clock & generates control signals.
 DPTR: (Data Pointer) - 16 bit
 DPH-Data Pointer High – 8 bit
 DPL-Data Pointer Low – 8 bit

DPTR Register is usually used for storing data and

intermediate results.
 Special
Function
Registers [SFR]
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• A Register (Accumulator)
• B Register
• Program Status Word (PSW) Register
• Data Pointer Register (DPTR)
– DPH (Data Pointer High) , DPL(Data Pointer Low)
• Stack Pointer (SP) Register
• P0, P1, P2, P3 - Input/output port Registers
• Timer T0 - TH0 & TL0
• Timer T1 – TH1 & TL1
• Timer Control (TCON) Register
• Serial Port Control (SCON) Register
• Serial Buffer Control (SBUF) Register
• IP Register (Interrupt Priority)
• IE Register (Interrupt Enable) 
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 8051 Register Bank Structure
4 MEMORY BANKS

Bank 3 R0 R1 R2 R3 R4 R5 R6 R7
Bank 2 R0 R1 R2 R3 R4 R5 R6 R7
Bank 1 R0 R1 R2 R3 R4 R5 R6 R7
Bank 0 R0 R1 R2 R3 R4 R5 R6 R7

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 Program Status Word [PSW]

C AC F0 RS1 RS0 OV F1 P
Carry Parity
Auxiliary Carry User Flag 1

User Flag 0 Register Bank Select Overflow

00-Bank 0
01-Bank 1
10-Bank 2
11-Bank 3
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 Data Pointer Register (DPTR)
It consists of two separate registers:
DPH (Data Pointer High) &
DPL (Data Pointer Low).
 

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 Stack Pointer (SP) Register

8 bit

P0, P1, P2, P3 – Input / Output Registers

8 bit

8 bit

8 bit

8 bit
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INSTRUCTION
SET OF
8051
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 8051 Instruction Set
 The instructions are grouped into 5 groups
 Arithmetic
 Logic
 Data Transfer
 Boolean
 Branching

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 1. Arithmetic Instructions
 ADD A, source
A  A + <operand>.

 ADDC A, source
A  A + <operand> + CY.
 SUBB A, source
A  A - <operand> - CY{borrow}.

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 INC
 Increment the operand by one. Ex: INC DPTR

 DEC
 Decrement the operand by one. Ex: DEC B
 MUL AB

A*B
Multiplication Result
8 byte * 8 byte A=low byte,
B=high byte

 DIV AB

A/B
Division Quotient Remainder
8 byte /8 byte
A B
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 Multiplication of Numbers
MUL AB ; A  B, place 16-bit result in B
and A
A=07 , B=02
MUL AB ;07 * 02 = 000E where B = 00 and A = 0E

Division of Numbers
DIV AB ; A / B , 8-bit Quotient result in A &
8-bit Remainder result in B
A=07 , B=02
DIV AB ;07 / 02 = Quotient 03(A) Remainder 01 (B)
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 2. Logical
instructions

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 ANL D,S
-Performs logical AND of destination & source
- Eg: ANL A,#0FH ANL A,R5
 ORL D,S
-Performs logical OR of destination & source
- Eg: ORL A,#28H ORL A,@R0

 XRL D,S
-Performs logical XOR of destination & source
- Eg: XRL A,#28H XRL A,@R0

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 CPL A
-Compliment accumulator
-gives 1’s compliment of accumulator data
 RL A
-Rotate data of accumulator towards left without carry
 RLC A
- Rotate data of accumulator towards left with carry
 RR A
-Rotate data of accumulator towards right without carry
 RRC A
- Rotate data of accumulator towards right with carry

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3. Data Transfer
Instructions

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 MOV Instruction
 MOV destination, source ; copy source to destination.

 MOV A,#55H ;load value 55H into reg. A

MOV R0,A ;copy contents of A into R0
;(now A=R0=55H)
MOV R1,A ;copy contents of A into R1
;(now A=R0=R1=55H)
MOV R2,A ;copy contents of A into R2
;(now A=R0=R1=R2=55H)
MOV R3,#95H ;load value 95H into R3
;(now R3=95H)
MOV A,R3 ;copy contents of R3 into A
;now A=R3=95H

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 MOVX
 Data transfer between the accumulator and
a byte from external data memory.
 MOVX A, @DPTR
 MOVX @DPTR, A

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 PUSH / POP
 Push and Pop a data byte onto the stack.

 PUSH DPL
 POP 40H

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 XCH
 Exchange accumulator and a byte variable
 XCH A, Rn
 XCH A, direct
 XCH A, @Ri

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4.Boolean variable
instructions

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CLR:
 The operation clears the specified bit indicated in
the instruction
 Ex: CLR C clear the carry
SETB:
 The operation sets the specified bit to 1.
CPL:
 The operation complements the specified bit
indicated in the instruction

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 ANL C,<Source-bit>

-Performs AND bit addressed with the carry bit.

- Eg: ANL C,P2.7 AND carry flag with bit 7 of P2

 ORL C,<Source-bit>

-Performs OR bit addressed with the carry bit.

- Eg: ORL C,P2.1 OR carry flag with bit 1 of P2

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 XORL C,<Source-bit>

-Performs XOR bit addressed with the carry bit.

- Eg: XOL C,P2.1 OR carry flag with bit 1 of P2

MOV P2.3,C
MOV C,P3.3
MOV P2.0,C
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5. Branching
instructions

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 Jump Instructions
 LJMP (long jump):
 Original 8051 has only 4KB on-chip ROM

 SJMP (short jump):

 1-byte relative address: -128 to +127

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 Call Instructions
 LCALL (long call):
 Target address within 64K-byte range

 ACALL (absolute call):

 Target address within 2K-byte range

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 2 forms for the return instruction:
Return from subroutine – RET
Return from ISR – RETI

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47
 8051
Addressing
Modes
 8051 Addressing Modes
 The CPU can access data in various ways, which are
called addressing modes
1. Immediate
2. Register
3. Direct
4. Indirect
5. Relative
6. Absolute
7. Long

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 1. Immediate Addressing Mode
 The immediate data sign, “#”
 Data is provided as a part of instruction.

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 2. Register Addressing Mode
 In the Register Addressing mode, the instruction involves
transfer of information between registers.

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 3. Direct Addressing Mode
 This mode allows you to specify the operand by giving its
actual memory address

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 4. Indirect Addressing Mode
 A register is used as a pointer to the data.
 Only register R0 and R1 are used for this purpose.
 R2 – R7 cannot be used to hold the address of an
operand located in RAM.
 When R0 and R1 hold the addresses of RAM locations,
they must be preceded by the “@” sign.

MOVX A,@DPTR
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 5. Relative Addressing
 This mode of addressing is used with some type of jump
instructions, like SJMP (short jump) and conditional
jumps like JNZ

Loop : DEC A ;Decrement A

JNZ Loop ;If A is not zero, Loop

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 6. Absolute Addressing
 In Absolute Addressing mode, the absolute
address, to which the control is transferred, is
specified by a label.
 Two instructions associated with this mode
of addressing are ACALL and AJMP
instructions.
 These are 2-byte instructions

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 7. Long Addressing
 This mode of addressing is used with the
LCALL and LJMP instructions.
 It is a 3-byte instruction
 It allows use of the full 64K code space.

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 8051
Assembly
Language
Programming(ALP)
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ADDITION OF TWO 8 bit Numbers
ADDRESS LABEL MNEMONICS

9100: MOV A,#05

MOV B,#03
ADD A,B
MOV DPTR,#9200
MOVX @DPTR,A
HERE SJMP HERE

After execution: A=08 58

 SUBTRACTION OF TWO 8 bit Numbers
ADDRESS LABEL MNEMONICS

9100: CLR C

MOV A,#05
MOV B,#03
SUBB A,B
MOV DPTR,#9200
MOVX @DPTR,A
HERE SJMP HERE
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After execution: A=02
MULTIPLICATION OF TWO DIVISION OF TWO 8 bit
8 bit Numbers Numbers
Address Label Mnemonics Address Label Mnemonics

9000 START MOV A,#05 9000 START MOV A,#05

MOV B,#03 MOV B,#03

MUL AB DIV AB

MOV DPTR,#9200 MOV DPTR,#9200

MOVX @ DPTR,A MOVX @ DPTR,A

INC DPTR INC DPTR

MOV A,B MOV A,B

MOVX @DPTR,A MOVX @DPTR,A

HERE SJMP HERE HERE SJMP HERE

After execution: A=0F , B=00 After execution: A=01 , B=02

 Average of N (N=5) 8 bit Numbers
MOV 40H, #02H store 1st number in location 40H
MOV 41H, #04H
MOV 42H, #06H
MOV 43H, #08H
MOV 44H, #01H
MOV R0, #40H store 1 st number address 40H in R0
MOV R5, #05H store the count {N=05} in R5
MOV B,R5 store the count {N=05} in B
CLR A Clear Acc
LOOP: ADD A,@R0
INC R0
DJNZ R5,LOOP
DIV AB
MOV 55H,A Save the quotient in location 55H
HERE SJMP HERE

Answer: 02+04+06+08+01 = 21(decimal) = 15 (Hexa)

SUM = 15 H Average = 21(decimal) / 5 = 04 (remainder) , 01 (quotient)
55 01 quotient