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Part 2
Part 2
Part 2
INTRODUCTION TO MICROPROCESSOR
Devices that are readily connected to the computer will be reset to a standby mode. System programs from permanent storage will be transferred to the RAM.
System program will display instructions to guide the user to proceed accordingly
START
1)
Microprocessor fetch instruction representing the signal carried by the address bus.
Execute Instruction
2)
No
Is it a HALT instruction?
Yes STOP
The control unit fetches an instruction from memory subsequently executes it by the following steps: a)sending an address to the memory unit (arrow 7). b)Read a command to the memory unit (arrow 6). c)The instruction word (codes) stored at the memory location is then transferred to the control unit (arrow 11). d)The instruction word, which is in some form of binary code, is then decoded by logic circuitry in the control unit to determine which instruction is being called for. e)The control unit uses this information to send the proper signals to the rest of the units in order to execute the specified operation.
Within the fetch cycle, there are two operations or sub-cycles, i.e. Read and write. READ CYCLE CPU sends a signal via control bus. If the bus is busy, CPU is put on Wait state. If the bus is free, CPU will place instruction address on the address bus. This address will be decoded or translated by the circuitry in the memory or I/O interface. Finally the data at that specific address is obtained, and is placed on the data bus.
READ CYCLE
Microprocessor issues address decoded the address and activates a signal to memory through address select line bus 00000101
select
Data at location 05H is placed onto the data bus and read by microprocessor
Data to CPU 00011000
00011000
Location FE Location FF
RD WR
control
The control circuit in memory initiates a read action
WRITE CYCLE
Write cycle enables CPU sends data to the memory or I/O devices. CPU will send a signal (request to write) to the control bus. If the data bus is free, the data is placed on the data bus, whereas the location address will be placed on the address bus. CPU will then send the data to the destination with respect to the address.
WRITE CYCLE
Microprocessor Address decoder issues address decoded the address and activates a signal to memory through address select line bus 00000100
select
8 bits
00100000
Location FE Location FF
RD WR
control
The control circuit in memory initiates a read action
Registers section:
These internal registers serve as temporary data storage, before, in progress and after the process done by ALU. Data transfer within these registers is much faster as compared to the memory. This section contains various registers (inside the MPU), each of which performs a special function. These registers are: general purpose registers array, accumulator, instruction register, program counter, and flag register.
The main function is to fetch instruction codes from program memory. Then decode (interpret) them, to generate into necessary control signals from MPU Then to execute the instructions. This section also generates timing and control signals (eg. R/W clock), that are needed by external RAM, ROM, and I/O devices.
The working element of a microprocessor is the internal registers, where raw data and addresses to be stored, moved around and transferred to be processed in the ALU. The MC68000 is an internal 32-bit processor, meaning that each register has 32 bits and the processor can perform arithmetic and logic operations on 32-bit operands.
DATA REGISTER
There are eight registers, denoted by D0-D7. Each can be used as a source or destination operand in a typical instruction. A data register may be accessed as a byte, word, or a longword. For a byte operation, only the least significant byte, i.e. bits 7-0, is used as an operand. The remaining 24 bits are not affected by the operation. Similarly, for a word operation, only the least significant half of the register can be used.
ADDRESS REGISTER
The address registers are primarily for generating memory operand addresses. Therefore, their accesses are more restrictive when compared to the data registers. There are nine address registers, which are referenced by A0-A7, with A7 consists two registers which also serve as Stack Pointer (either SSP or the USP). An address register cannot be referenced as a byte operand. When an operand is specified as a source, an address register can be accessed as a word (its lower 16 bits) or longword operand.
But, when used as a destination in a word operation, the operand word is sign-extended to a longword before being stored into the destination address register. This means that the entire register will be affected regardless of whether the operation size is word or longword. Although the program counter and address registers are 32 bits long, only the lower 4 bits are used for addressing the memory. This limits the programming space to 16 megabytes.
Address register A7 also serves as SP either supervisor stack pointer (SSP) or the user stack pointer (USP), depending on the supervisor bit in the status register. In a subroutine call or some other instructions, the active system SP is automatically used for saving and restoriing the return address and other information. The active system SP is the SSP in the supervisor mode and the USP in the user mode.
The PC always points to the next instruction to be executed. Unlike a general purpose register, it cannot be explicitly specified as an operand in any instruction except as an index register. During a branch-type instruction, the destination is loaded into the PC. For any other instruction, its content are incremented by the instruction length as the instruction is executed.
The status register (SR) has 16 bits and is divided into the system byte and user byte. The user byte contains five condition flags. The remaining 3 bits are not used and remain zero. The condition flags contain information on the result of the last processor operation. The setting can be tested by conditional branch instructions.
MODEL PENGATURCARAAN
Menunjukkan daftar CPU yang boleh dicapai oleh pengaturcaraan. Model pengaturcaraan 68000 mengandungi 8 7 2 1 daftar data 32 bit (D0-D7) daftar alamat 32 bit (A0-A6) penunding tindanan (A7-A7) pembilang aturcara 32 bit (PC)
DAFTAR DATA
Fungsi : menyimpan data yang akan diproses atau yang telah diproses oleh ALU. Saiz : setiap daftar data bersaiz 32 bit (0-31 bit)
Data long word 32 bit (0-31 bit) Data word 16 bit (0-15 bit) Data byte 8 bit (0-7 bit)
31
16 15
8 7
D0
8 Daftar data
D1 D2
D3
D4
D5 D6 D7 31 16 15 0
A0 A1 A2 A3 A4 A5 A6
Daftar
alamat
31
16 15
0 A7 A7
Penuding tindanan
Pembilang aturcara
31
16 15
0
PC
15
0 SR
DAFTAR ALAMAT
A0-A7 merupakan lokasi objek dalam ingatan. Operasi byte tidak dijalankan kerana alamat bersaiz 16 bit atau 32 bit. Bagi alamat 68000 adalah 24 bit. 24 bit daripada 32 bit.
STACK POINTER
Stack Pointer ( penunding tindanan) Merupakan daftar alamat A7 iaitu A0 A6. Penunding tindanan :
Adalah sebagai ciri keselamatan dengan ciri multiaturcara dan multipengguna. Pada USP, STOP dan RESET tidak boleh dilaksanakan.
Program Counter
Dipanggil sebagai pembilang aturcara. Hanya 24 bit daripada 32 bit yang dapat dikeluarkan ke bas alamat kerana itulah saiz fizikal bas alamat.
Organisasi Ingatan
BAS ALAMAT