Professional Documents
Culture Documents
Intel 8086
Intel 8086
Reference: Yu / Marut
Chapter 02, Chapter 03
8086 Microprocessor:
Pin Diagram
Functional Blocks
Register array or Data Bus
internal memory
ALU
Instruction decoding
unit
Flag Register
Timing and
control unit PC/ IP
8086 Architecture
EU executes instructions that
have already been fetched by
the BIU.
• Index Registers
-SI (Source Index)
-DI (Destination Index)
• Pointer Registers
-IP (Instruction Pointer); usually inaccessible
-BP (Base Pointer)
-SP (Stack Pointer)
REGISTERS
• The program’s code, data, & stack are loaded into different memory
segments named: Code Segment, Data Segment, Stack Segment.
• To keep track of various program segments, 8086 has 4 segment
registers.
Segment Registers : hold segment numbers.
-CS (Code Segment)
-DS (Data Segment)
-SS (Stack Segment)
-ES (Extra Segment)
If a program needs to access a second data segment, it can use the ES
register.
REGISTERS
• The registers SP, BP, SI DI normally point to memory
locations. They contain Offset Addresses of memory
locations.
U: UNDEFINED
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
U U U U OF DF IF TF SF ZF CF AF U PF U CF
Flags
• 8086 has 9 flags: Status flags(6) and Control flags(3)
• Status flags are
1. Carry flag (CF)
2. Parity flag (PF)
3. Overflow flag (OF)
4. Zero flag (ZF)
5. Sign flag(SF)
6. Auxiliary flag(AF)
Flags
Control flags are
1. Trace flag(TF)
2. Interrupt flag (IF)
3. Direction flag (DF)
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
U U U U OF DF IF TF SF ZF CF AF U PF U CF
Thank You