COMPUTER ORGANIZATION AND ARCHITECTURE

MOD U LE- 1 PART TWO

- LIPSA SUBHADARSHINI

Subject Code- BC 2007

No. of Credits- 4
BCA 3rd Semester

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 U N I T- 1 : I N T R O D U C T I O N T O D I G I TA L E L E C T R O N I C S

• Sequential Circuits
• Shift Registers
• Counters

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Parameters Combinational Circuit
Meaning and Definition It is a type of circuit that generates an
output by relying on the input it
receives at that instant, and it stays
independent of time.
Feedback A Combinational Circuit requires no
feedback for generating the next
output. It is because its output has no
dependency on the time instance.
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C I R C U I T S
Sequential Circuit
It is a type of circuit in which the
output does not only rely on the
current input. It also relies on the
previous ones.
The output of a Sequential Circuit, on
the other hand, relies on both- the
previous feedback and the current
input. So, the output generated from
the previous inputs gets transferred in
the form of feedback. The circuit uses
it (along with inputs) for generating the
next output.
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Performance We require the input of only the In the case of a Sequential Circuit,
current state for a Combinational the performance is very slow and
Circuit. Thus, it performs much also comparatively lower. Its
faster and better in comparison dependency on the previous inputs
with the Sequential Circuit. makes the process much more
complex.
Complexity It is very less complex in comparison. This type of circuit is always more
It is because it basically lacks complex in its nature and
implementation of feedback. functionality. It is because it
implements the feedback, depends on
previous inputs and also on clocks.
Elementary Blocks Logic gates form the building/ Flip-flops form the building/
elementary blocks of a Combinational elementary blocks of a Sequential
Circuit. Circuit.
Operation One can use these types of circuits for You can mainly make use of these
both- Boolean as well as Arithmetic types of circuits for storing data.
operations.

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• Flip-flops are the basic piece of sequential logic. They effectively store a single binary digit of state. There are a variety of
flip-flops available that differ on how that state is manipulated.
• Since a flip-flop stores a binary digit it must, by definition, have 2 states. Furthermore it is bistable, which means it is
stable in each state: when is put in a specific state, it will stay in that state until something causes it to change to the other
state.
• Flip-Flops are the basic memory elements which store one-bit binary data.
• There are four types of flip-flops:
• S-R Flip-Flop
• J-K Flip-Flop
• D Flip-Flop
• T Flip-Flop

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Clocked S-R Flip-Flop

The operation of a basic flip-flop can be modified by providing an additional control input that determines when the state of the
circuit is to be changed.
The limitation with a S-R flip-flop using NOR and NAND gate is the invalid state. This problem can be overcome by using a stable
SR flip-flop that can change outputs when certain invalid states are met, regardless of the condition of either the Set or the Reset
inputs.

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D flip-flop is a slight modification of clocked SR flip-flop.

From the above figure, you can see that the D input is connected to the S input and the complement of the D input is
connected to the R input.
When the value of CP is '1' (HIGH), the flip-flop moves to the SET state if it is '0' (LOW), the flip-flop switches to
the CLEAR state.

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J-K Flip-Flop
J-K flip-flop can be considered as a modification of the S-R
flip-flop.
The main difference is that the intermediate state is more
refined and precise than that of an S-R flip-flop.
The characteristics of inputs 'J' and 'K' is same as the 'S' and
'R' inputs of the S-R flip-flop.
J stands for SET, and 'K' stands for CLEAR.
When both the inputs J and K have a HIGH state, the flip-flop
switches to the complement state, so, for a value of Q = 1, it
switches to Q=0, and for a value of Q = 0, it switches to Q=1.

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T flip-flop is a much simpler version of the J-K flip-flop.

Both the J and K inputs are connected and are also called as
a single input J-K Flip-flop.

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Triggering of Flip-Flops
• The state of the flip-flop is changed by a momentary change in the input signal. This momentary change is known as Trigger, and the transition it
causes is said to triggering the flip-flop.
• Pulses trigger clocked flip-flops.
• A pulse start from the initial value of '0', goes momentarily to '1', and after a short while, returns to its initial '0' value.
• A clock pulse is either positive or negative.
• A positive clock source remains at '0' during the interval between pulses and goes to 1 during the occurrence of a pulse.
• The pulse goes through two signal transition: from '0' to '1' and return from '1' to '0'.
• The positive transition is defined as a positive edge and the negative transition as a negative edge.

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Registers
• A Register is a fast memory used to accept, store, and transfer data and instructions that are being used immediately by the CPU.
• A Register can also be considered as a group of flip-flops with each flip-flop capable of storing one bit of information.
• A register with n flip-flops is capable of storing binary information of n-bits.
• The flip-flops contain the binary information whereas the gates control the flow of information, i.e. when and how the information?s are transferred into a
register.
• Different types of registers are available commercially. A simple register consists of only flip-flops with no external gates.
• The transfer of new data into a register is referred to as loading the register.

• The above figure shows a register constructed with four D-type flip-flops and a common clock pulse-input.
• The clock pulse-input, CP, enables all flip-flops so that the information presently available at the four inputs can be transferred into the four-bit register.

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Shift - Registers
• Shift - Registers are capable of shifting their binary information in one or both directions. The logical configuration of a Shift -
Register consists of a series of flip-flops, with the output of one flip-flop connected to the input of the next flip-flop.
• The basic configuration of a Shift - Register contains the following points:
• The most general Shift - Registers are often referred to as Bidirectional Shift Register with parallel load.
• A common clock is connected to each register in series to synchronize all operations.
• A serial input line is associated with the left-most register, and a serial output line is associated with the right-most register.
• A control state is connected which leaves the information in the register unchanged even though clock pulses are applied
continuously.

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Counter 
A Counter is a device which stores (and sometimes displays) the number of times a particular event or process has
occurred, often in relationship to a clock signal. Counters are used in digital electronics for counting purpose, they can
count specific event happening in the circuit. For example, in UP counter a counter increases count for every rising edge of
clock. Not only counting, a counter can follow the certain sequence based on our design like any random sequence
0,1,3,2… .They can also  be designed with the help of flip flops. They are used as frequency dividers where the frequency
of given pulse waveform is divided. Counters are sequential circuit that count the number of pulses can be either in binary
code or BCD form. The main properties of a counter are timing , sequencing , and counting. Counter  works in two modes 
1. Up counter 
2. Down counter
Counters are broadly divided into two categories 
3. Asynchronous counter
4. Synchronous counter
1. Asynchronous Counter 
In asynchronous counter we don’t use universal clock, only first flip flop is driven by main clock and the clock input of rest
of the following flip flop is driven by output of previous flip flops. We can understand it by following diagram-

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It is evident from timing diagram that Q0 is changing as soon as the rising edge of clock pulse is encountered, Q1 is
changing when rising edge of Q0 is encountered(because Q0 is like clock pulse for second flip flop) and so on. In this
way ripples are generated through Q0,Q1,Q2,Q3 hence it is also called RIPPLE counter. A ripple counter is a
cascaded arrangement of flip flops where the output of one flip flop drives the clock input of the following flip flop 
2. Synchronous Counter 
Unlike the asynchronous counter, synchronous counter has one global clock which drives each flip flop so output
changes in parallel. The one advantage of synchronous counter over asynchronous counter is, it can operate on higher
frequency than asynchronous counter as it does not have cumulative delay because of same clock is given to each flip
flop. 

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