8086 MICROPROCESSOR HARDWARE

SPECIFICATIONS
(CHAPTER 6)

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 8086 Pin Specification

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 Pin No 1: Pin no 1 is the Vss or Ground. It is used to connect with
the negative terminal of the power source.
 Pin No 2 to 16: These are the bidirectional pins. These pins are used
to carry both address and data bits. The microprocessor 8086 uses a
20 line address bus. Pins 2 to 16 are named as AD14 to AD0. Here,
A indicates the address and D indicates the data. These
 Pin No 17: Pin no 17 is the NMI or Non-maskable interrupt. It is
used to provide the edge-triggered interrupt signal.
 Pin No 18: It is named as INTR. It is also an interrupt pin. It is
sampled during the last cycle of the instruction.
 Pin No 19: It is used to connect an external crystal oscillator to the
microprocessor. During the program or instruction execution, the
oscillator provides the pulse or timing signal to the microprocessor.
The clock signal is in the form of the asymmetric square wave. The
examples
09/18/2023 of clock frequency are 5MHz, 8MHz, 10MHz. 5
• Pin No 20: Pin no20 is also the Vss or Ground terminal and is to be connected to
the negative terminal of the power source.
• Pin No 21: Pin no 21 is the RESET. It is used to reset the microprocessor or
terminate its all current program executions. The signal is to be high for the first 4
clock cycle to reset the microprocessor and all the devices connected to it.
• Pin No 22: Pin no 22 is READY. It is used to communicate between the
microprocessor and external devices that they can notify that they are ready to
communicate or ready to send or receive signals. It works with the active high
signal. That means when the signal is high, it indicates that the devices are ready. If
the signal is low, it indicates that the devices are not ready, so wait for it.
• Pin No 23: Using this 'Wait' instruction is to be provided. When the signal in this
pin is low the program execution in the microprocessor remains continuing but if
the signal in this pin is high it pauses the operation.
• Pin No 24 and 25: In the maximum mode of the microprocessor, QS1 and QS0 are
used for the queue status signals such as whether 'there is no operation', 'first-byte
opcode', 'empty queue', and 'subsequent byte from the queue'. In the minimum
mode, these are works as INTA(Interrupt acknowledge) and ALE(Address Latch
Enable)

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• Pin No 26 to 28: Maximum Mode - S0, S1, S2 are the status pins. During the
read, write operations with memory or any communication with I/O devices, these
pins show the status such as 'interrupt acknowledgement', 'I/O read and write
operations', 'Memory Read and Write operations', 'Halt', 'Code Acess', etc.
• Minimum Mode - 26, 27, and 28 are works as DEN', DT/R', and IO'/M
respectively.
• Pin No 29: In the maximum mode, it acts as Lock'. It is used to lock the bus while
a program executing so other systems cannot use the system bus.
• In the minimum mode, it acts as Write(WR') pin that is used to store data to the
external memory.
• Pin No 30 and 31: In the maximum mode, they act as RQ'/GT1' and RQ'/GT0'.
The RQ/GT means request/grant. These are the bi-directional pins and they are
used to request the processor to leave the system bus. In the minimum mode, they
act as HOLD and HLDA(hold acknowledge) respectively.
• Pin No 32: It is the Read(RD') pin. It is an active low pin and is used to fetch data
from the external memory to the microprocessor.

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• Pin No 33: Using this pin the operating mode of the
microprocessor can be changed. When the signal in this pin is low,
the microprocessor will operate in maximum mode, and when the
signal in this pin is high, the microprocessor will operate in
minimum mode.
• Pin No 34: Pin no 34 is BHE'/S7. That means Bus High Enable/
Status. Bus High Enable is the active low and status is the active
high.
• Pin No 35 to 38: Pins from 35 to 38 are used for the carrying of
addresses and data bytes. Also, they use it for status.
• Pin no 39: It is used to carry addresses and data bytes.
• Pin No 40: Pin no 40 is the Vcc and it is used to connect the
positive terminal of the power supply.
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8086 Microprocessor can operate in two modes—MIN
mode and MAX mode.
• When MN/MX pin is high, it operates in MIN mode
and when low, 8086 operates in MAX mode.
Minimum mode
• The 8086 processor works in a single processor
environment.
• All control signals for memory and I/O are generated
by the microprocessor.

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Maximum mode
• here, 8086 is designed to be used when a coprocessor
exists in the system.
• 8086 works in a multiprocessor environment.
• Control signals for memory and I/O are generated by
an external BUS Controller of integrated circuit (IC)
(8288).
For a small system in which only one 8086
microprocessor is employed as a CPU, the system
operates in MIN mode (Uniprocessor). While if more
than one 8086 operate in a system then it is said to
operate in MAX mode (Multiprocessor).
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 • The following pins are lost when the 8086 operates
in Maximum mode .
• ALE
• WR
• IO/ M
• DT/ R
• DEN
• INTA
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 The microprocessor has 3 buses:
 Control
 Address
 Data
 The address/data and address/status buses are
multiplexed to reduce the device pin count.
 The ALE (Address Latch enable ) pin is used to
control the set of latches.

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 Pin Connection

AD15 – AD0(Address/Data bus lines)

• These are multiplexed lines.
Line carries address when ALE =1
Line carries data when ALE =0
A19/S6 – A16/S3(Address/Status bus bits)
• are multiplexed to provide address signals A19-A16 and
status bits S6-S3.
• S6 – always logic 0
S5 – indicates the condition of the interrupt flag(IF).
S4 and S3 – Indicate the segment being accessed during
current bus cycle.
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 Pin Connection

RD (read signal)
When this read signal pin is at logic 0, the data bus is
receptive to data from memory or I/O devices.
• It is an output signal
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It is an active when low signal. 14
 Pin Connection

READY : input signal

 Inserts wait states into the timing
This is an acknowledgement signal from slower
I/O devices or memory.
• It is an active high signal.
• When high, it indicates that the device is ready
to transfer data. the microprocessor does
normal operation.
• When low, then microprocessor is in wait
state.
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Two hardware interrupt inputs:
INTR:
• Interrupt request pin is used to request a hardware
interrupt. If INTR is held at high when IF =1, the processor
goes into the interrupt acknowledgement cycle. INTA
becomes active when interrupt is being serviced.
• The IF flag bit is set (to enable interrupts) by the STI(Set
Interrupt Flag) instruction, and cleared by CLI(Clear
Interrupt Flag).
NMI:
• Non-maskable interrupt input is similar to INTR expect
that the NMI interrupt does not check IF or priority.
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TEST’(BUSY’) : an input that is tested by the WAIT instruction
– WAIT instruction function as a NOP : if TEST’= 0
– WAIT instruction wait for TEST’ to become 0:if TEST’=1

RESET:
• RESET input: resets the microprocessor (to reboot the computer).
• It is a system reset.
• It is an active high signal.
• When high, microprocessor enters into reset state and terminates the
current activity.
• It must be active for at least four clock cycles to reset the
microprocessor.
• When 8086 is reset it begins execution at memory location FFFF0H
and clears the IF.
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CLK(CLOCK):
• The clock pin is used to connect a clock generator
• This clock input provides the basic timing for
processor operation.
VCC(power supply) :
• The power supply . +5V should be connected to this
pin.
GND:
• The ground connection for the microprocessor.
• two pins labeled GND
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MN/MX:
• The minimum/maximum mode pin selects the mode
for the processor. To select minimum mode processor,
it should be connected directly to +5.0V(Vcc or logic
high) and to select maximum mode processor, it
should be connected directly to GND or Vss(logic
low).

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BHE/S7:
• The bus high enable pin is used in the 8086 to
enable the Most significant data bus bits during a
read or write operation.
• BHE signal is used to indicate the transfer of data
over higher order data bus (D8 – D15).
• 8-bit I/O devices use this signal.
• It is used by microprocessor for memory banking

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 Pin Connections ( Minimum mode)

M/IO
• This pin indicates whether the address bus contains a memory
address or an I/O port address.
• This signal is issued by the microprocessor to distinguish
memory access from I/O access.
• When it is high, memory is accessed.
• When it is low, I/O devices are accessed.
WR:
• The write line is used when the microprocessor is writing
data to memory and the memory bus contains a valid address.

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 Pin Connections ( Minimum mode)
INTA:
• Interrupt acknowledgement signal is a response to
INTR input pin.
• Goes low in response to a hardware interrupt request
applied to the INTR input.
• When microprocessor receives INTR signal, it
acknowledges the interrupt by generating this signal.

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Pin Connections ( Minimum Mode)
ALE:
• Address Latch enable shows whether the multiplexed
AD lines carry address or data.
• ALE=1: Line carries address
• ALE =0: Line carries data
DT/R:
• Data transmit/receive shows that the microprocessor
data bus is transmitting(1) or receiving(0) data. This is
used to control buffers.
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 Pin Connections ( Minimum mode)
DEN :output (data bus enable):
• Active when AD bus carries data.
HOLD : request a direct memory access(DMA)
– if HOLD=1 : µ stops executing software and places
address, data, and control bus at high-impedance state
– HOLD=0 : µ execute software normally
• HOLDA(hold acknowledge):indicate µ has entered
hold state

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 Maximum Mode Pins
• R1’/GT1’, R0’/GT0’(request/grant) : request DMA
– bi-directional, request and grant DMA operation
• LOCK’(lock output): used to lock peripherals off the system
– activated by using the LOCK: prefix on any instruction
• QS1, QS0(queue status) :
– show status of internal instruction queue :

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 Maximum Mode Pins
• S2,S1,S0 status signals used by the 8086 bus controller to
generate bus timing and control signals. These are decoded as
shown.
Status signal Machine cycle

S2 S1 S0
0 0 0 Interrupt acknowledge
0 0 1 Red I/O port
0 1 0 Write I/O port
0 1 1 Halt
1 0 0 Code access
1 0 1 Read memory
1 1 0 Write memory
1 1 1 Passive /active
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