This document discusses interrupts, buses, and bus widths in computer systems. It defines interrupts as mechanisms that allow other modules like I/O devices to interrupt normal processing. It describes different types of interrupts like program interrupts, timer interrupts, and I/O interrupts. It then discusses buses as communication pathways connecting devices and describes system buses that connect major components like the processor, memory, and I/O. It explains that system buses consist of multiple lines for carrying data, addresses, and control signals. Finally, it notes that wider data and address buses improve system performance and capacity, respectively.
This document discusses interrupts, buses, and bus widths in computer systems. It defines interrupts as mechanisms that allow other modules like I/O devices to interrupt normal processing. It describes different types of interrupts like program interrupts, timer interrupts, and I/O interrupts. It then discusses buses as communication pathways connecting devices and describes system buses that connect major components like the processor, memory, and I/O. It explains that system buses consist of multiple lines for carrying data, addresses, and control signals. Finally, it notes that wider data and address buses improve system performance and capacity, respectively.
This document discusses interrupts, buses, and bus widths in computer systems. It defines interrupts as mechanisms that allow other modules like I/O devices to interrupt normal processing. It describes different types of interrupts like program interrupts, timer interrupts, and I/O interrupts. It then discusses buses as communication pathways connecting devices and describes system buses that connect major components like the processor, memory, and I/O. It explains that system buses consist of multiple lines for carrying data, addresses, and control signals. Finally, it notes that wider data and address buses improve system performance and capacity, respectively.
I/O) may interrupt normal sequence of processing • Program —e.g. overflow, division by zero • Timer —Generated by internal processor timer —Used in pre-emptive multi-tasking • I/O —from I/O controller • Hardware failure —e.g. memory parity error Multiple Interrupts - Sequential Multiple Interrupts – Nested Time Sequence of Multiple Interrupts What is a Bus? • A communication pathway connecting two or more devices • Often grouped —A number of channels in one bus —e.g. 32 bit data bus is 32 separate single bit channels • Power lines may not be shown Bus Structure (system bus) • A bus that connects major computer components (processor, memory, I/O) is called a system bus. • A system bus consists, typically, of from about 50 to hundreds of separate lines. Each line is assigned a particular meaning or function. Data Bus • Carries data —Remember that there is no difference between “data” and “instruction” at this level • Width is a key determinant of performance —8, 16, 32, 64 bit Address bus • Identify the source or destination of data • e.g. CPU needs to read an instruction (data) from a given location in memory • Address bus width determines maximum memory capacity of system —e.g. 8080 has 16 bit address bus giving 64k address space • Furthermore, the address lines are generally also used to address I/O ports. Control Bus • Control and timing information —Memory read/write signal —Interrupt request —Clock signals Bus Interconnection Scheme BUS WIDTH
• The width of the data bus has an impact
on system performance: —The wider the data bus, the greater the number of bits transferred at one time.
• The width of the address bus has an
impact on system capacity: —the wider the address bus, the greater the range of locations that can be referenced.