Professional Documents
Culture Documents
Ch2 EECE169 CSE16 Diode Applications
Ch2 EECE169 CSE16 Diode Applications
Ch2 EECE169 CSE16 Diode Applications
Diode Applications
1
Diode Applications
2
Load-Line Analysis D1
DIODE
VD
ID
The load line plots all possible
R
+ E VR
combinations of diode current (ID)
and voltage (VD) for a given circuit.
The maximum ID equals E/R, and
the maximum VD equals E.
The point where the load line and
the characteristic curve intersect is
the Q (Quiescent)-point , which
identifies ID and VD for a particular
diode in a given circuit.
E=V +I R
D D 3
Putting V = 0 and I = 0
Series Diode Configurations
Forward Bias
Constants
• Silicon Diode: VD = 0.7 V
• Germanium Diode: VD = 0.3 V
0.7V 10V
VD(V) 7
Series Diode Configurations contd…
Example2.3 (Page-64):
Repeat example 2.1 using the
ideal diode model, determine V
+ D
a. VDQ and IDQ ID
Si
b. RD + +
E=10V VR R=.5kΩ
ID(mA)
20mA Q
10V
VD(V) 8
Series Diode Configurations contd…
9
Series Diode Configurations contd…
+0.5V
ID
Example2.6 (Page-68): For +
series diode configuration Si VD
model, determine VD , VR and
ID +
R=1.2kΩ VR
VD
+
ID
VD =0.5V , ID=0 mA Si
+ +
and VR =0V E= 0.5V VR R=1.2kΩ
10
Series Diode Configurations contd…
Example2.9 (Page-70): Determine I, V1 , V2 and V0 for
the series DC configuration in fig
R1=4.7kΩ
Si
+
E1=10V V1 +V
I D
+ R2=2.2kΩ V0
V2
E =-5V
I=2.07mA, V1=9.73V, V2=4.55V and V0 =-0.45V
2
11
Parallel Configurations
Example 2.10 (Page-71): Determine Vo, I1, ID1 and ID2
V 0.7 V
o
V V V 0.7 V
D1 D2 O
V 9.3 V
R
EV 10 V .7 V
I I D 28 mA
R 1 R .33kΩ
28 mA
I I 14 mA
D1 D2 2
13
Parallel Configurations
Example 2.13 (Page-74): Determine the current I1, I2 and ID2
D1
+
I2 I1
Si ID2
+ +
E= 20V Si D2 R1=3.3 KΩ
R2=5.6 KΩ
Sinusoidal Wave
Half wave rectifier
Ideal diode (Vdc=0.318Vm )
Si/Ge diode {Vdc=0.318(Vm -Vk ) }
16
PIV (PRV)
Because the diode is only forward biased for one-half of
the AC cycle, it is also reverse biased for one-half cycle.
It is important that the reverse breakdown voltage rating of
the diode be high enough to withstand the peak, reverse-
biasing AC voltage.
PIV (or PRV) ≥ Vm
• PIV = Peak inverse voltage
• PRV = Peak reverse voltage
• Vm = Peak AC voltage
Disadvantages • Output voltage is low
• AC supply delivers only half cycle
• Filtering is required to produce DC current
17
• PIV is greater than Vm ,diode may damage
Half -Wave Rectifier
Example 2.16 (Page-78): Determine Vo
+ +
Vi R=2kΩ Vo
18
Full-Wave Rectification
The rectification process can be
improved by using a full-wave
rectifier circuit.
19
Full-Wave Rectification
Bridge Rectifier:
• Four diodes are
connected in a
bridge configuration
• Vdc = 0.636Vm
20
Full-Wave Rectification
Example 2.17 (Page-82): Determine the output waveform
for the network and calculate the output DC level and the
required PIV for each diode.
+
Vm=10V 2kΩ
Vi
Vo +
2kΩ
2kΩ
Center-Tapped Transformer
Rectifier
Requires
• Two diodes
• Center-tapped
transformer
Vdc = 0.636Vm 22
PIV (PRV) for Centre Tapped Transformer
Inserting the maximum voltage for the secondary voltage
and Vm as established by adjoining loops.
23
Diode Clippers
These are networks that
employ diodes to clip away
a portion of an input signal
without distorting the
remaining part of the
applied waveform
25
Series Clipper Circuits
+ +
Vi Vo
R
+ +
Vi Vo
26
Biased Clippers
Adding a DC
source in series
with the clipping
diode changes the
effective forward
bias of the diode.
Applying KVL,
Vi +V-Vo=0
27
Parallel Clippers
28
Parallel Clipper Circuits
R
+ +
Vi Vo
R Vo
+ +
Vi Vo V
V +
29
Parallel Clippers Circiuts contd…
R
+ +
Vi Vo
30
Clipper Circuits
Example 2.19 (Page-85): Find the output voltage for the
network in Fig. if the applied signal is square wave of Fig.
V=5V
+ + +
Vi 20V
R Vo
V i
T/2 T
-10V 20V
Vo
T/2 T 31
Summary of Clipper Circuits
32
Summary of Clipper Circuits contd…
33
Clampers
34
For Clampers
• Start the analysis with that part of the input signal that
will forward bias the diode.
• During the on state of diode, the capacitor will be
charged up to the applied voltage.
• During the off state of the diode, the capacitor will hold
the charge.
• Remain aware of the location and polarity of Vo.
• Total output swing must match the input signal .
35
Biased Clamper Circuits
Clamping networks have a
capacitor connected directly
from input to output with a
resistive element in parallel with
the output signal. The diode is
also in parallel with the output
signal but may or may not have
a series dc supply as an added
element
The input signal can be any type
of waveform such as sine,
square and triangle waves.
The DC source lets you adjust
the DC clamping level. 36
Summary of Clamper Circuits
37
Zener Diodes
38
Zener Diodes
The Zener is a diode
operated in reverse bias
at the Zener Voltage (Vz).
• When Vi VZ
– The Zener is on
– Voltage across the Zener is VZ
– Zener current: IZ = IR – IRL
– The Zener Power: PZ = VZIZ
• When Vi < VZ
– The Zener is off
39
– Zener acts as an open circuit
Voltage-Multiplier Circuits
40
Voltage Doublers
41
Voltage Doublers
• Positive Half-Cycle
• D1 conducts
• D2 is switched off
• Capacitor C1 charges to Vm
• Negative Half-Cycle
• D1 is switched off
• D2 conducts
• Capacitor C2 charges to Vm
42
Voltage Tripler and Quadrupler
43
Practical Applications
• Rectifier Circuits
– Conversions of AC to DC for DC operated
circuits
– Battery Charging Circuits
• Zener Circuits
– Overvoltage Protection 44
–
For Practice
• Example: 2.5, 2.7, 2.21, 2.23, 2.24 and
2.26
Assignment-1
Problem: 7, 8, 11, 13, 34, 35, 37,
40 and 41