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Ue20ec205 20211120095513
Ue20ec205 20211120095513
Sumanth Sakkara
Department of Electronics and Communication Engineering.
COMPUTER AIDED DIGITAL DESIGN
HDL descriptions of state machines are correspondingly divided into three parts
to model the
1.State register
2.Next state logic .
3.Output logic.
In Moore machines, the outputs depend only on the current state of the
machine.
In Mealy machines, the outputs depend on both the current state and the
current inputs
Computer Aided Digital Design
FINITE STATE MACHINES
.
Computer Aided Digital Design
Hardware Description Language 2 : PATTERN RECOGNIZER MOORE FSM
.
Moore FSM Mealy FSM
Reset Reset
0 1 0/0
S0 S1 S2 S0 S1
0 0 1
1 0 0 1/0 0/0
1
1/1
Moore FSM
Reset
0 1
S0 S1 S2
0 0 1
1 0 0
1
Computer Aided Digital Design
Hardware Description Language 2 : PATTERN RECOGNIZER MOORE FSM
Moore FSM
Reset
0 1
S0 S1 S2
0 0 1
1 0 0
1
Computer Aided Digital Design
Hardware Description Language 2 : PATTERN RECOGNIZER MOORE FSM
Mealy FSM
Reset
0/0
S0 S1
1/0 0/0
1/1
Computer Aided Digital Design
Hardware Description Language 2 : PATTERN RECOGNIZER MOORE FSM
Mealy FSM
Reset
0/0
S0 S1
1/0 0/0
1/1
Computer Aided Digital Design
Hardware Description Language 2
FINITE STATE MACHINES (FSM) :