DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING

GDI Logic Based Design of Hamming -Code Encoder and

Decoder for Error Free Data Communication

PRESENTED BY: UNDER THE GUIDENCE OF:

Batch Number: B8 MR K SRIKANTH
• GANESH - 21C35A0437 (ASSISTANT PROFESSOR)
• ASHRITHA - 21C35A0410 DEPARTMENT OF ELECTRONICS AND COMMUNICATION
• ROHITH - 21C35A0419 ENGINEERING
• MUSHEER - 20C31A0483
• GANESH - 20C31A0473
 Contents

• Abstract • Objectives
• Literature Survey • Introduction
• Problem Identification • Software Required
• Existing system • Advantages & Applications
• Proposed System • References
 Abstract
In this project , Hamming code encoder and decoder circuit is designed on Gate
Diffusion Input (GDI) logic to achieve error free transmission and reception in
digital data communication. GDI logic is a new technique used for designing low
power VLSI circuits. This Technique provides better trade off between power, delay
and area compared to other existing logic styles, while maintaining low complexity
of the circuit. Hamming code encoder and decoder circuit architectures are
developed using GDI technique and are simulated in gdpk 250 nm technology using
Mentor Graphics EDA tool. The advantages of GDI technique is reported in this
project in comparison to architectures developed using CMOS logic styles.
 Literature Survey

 15-bit NOVEL Hamming Codec using HSPICE 22nm CMOS Technology

based on GDI Technique
Raj Kumar Mistri, Rahul Ranjan ,Manohar Mahto, Manish Jose Minz

 In this project hamming codec and novel hamming codec was designed by
various technologies like TG tech, pass transistor and GDI technology.

 In order to design 15-bit novel hamming code by various technologies like TG,
pass transistor and GDI tech, it requires 256, 192 and 128 nos. of transistors.

 Hence novel hamming codec saves 3.12% of area over hamming codec in each of
design technologies.
 VLSI design of Parity check Code with Hamming Code for Error Detection
and Correction
Subhasri.G, Radha.N

 This Implementation provides an easy and efficient error detection and correction
method for providing error-free data transmission in wireless communication.
 Such encoder and decoder block are individually designed and the main module
is designed by means of combining all the individual blocks by using verilog
coding in Xilinx ISE software.
 And the comparative analysis about various parameters such as memory usage,
time, code rate, bit overhead and error correction capabilities for each parity
check codes with hamming code can be done.
 Reduced Area & Improved Delay Module Design of 16-Bit Hamming Codec
using HSPICE 22nm Technology based on GDI Technique

Raj Kumar Mistri , Md Arman Ansari, Md Mustak Ali, Manju Kumari,

Manoj Prabhakar, Manju Kumari
 The GDI tech. save 55.82% time over CMOS & 31.46% time over TG tech. in
case of encoder. In case of decoder, GDI tech. save 55.95% time over CMOS and
32.85% over TG technology.
 The GDI tech. save 66.67% chip area over CMOS & 50% over TG tech. in case
of hamming encoder. In case of decoder GDI tech save 54.23% chip area over
CMOS & 44.75% over TG technique.
 Problem Identification

• More number of transistors due to CMOS technology

• Large delay
• More Power Consumption
 Existing system

 Design of Hamming Code Encoder and Decoder for Error

Free Data Communication using CMOS TECHNOLOGY
 Proposed System

 GDI Logic Based Design of Hamming -Code Encoder and

Decoder for Error Free Data Communication
Hamming -Code Encoder Hamming -Code Decoder
 Objectives

 The main Objective is to use GDI logic to design a Hamming

Code encoder and decoder for error-free data
communication, focusing on efficiency, low power
consumption, and robust error detection and correction.
 Introduction

 Data can be corrupted during transmission ,For reliable communication,

errors must be detected and corrected
 So we require a Coding technique to overcome these errors at receiver.

 There are Various coding scheme used according to the need and
application like Hamming code, Cyclic coding ,convolutional code etc..
 Errors
 What is Error?
o Error is a condition when the output information does not match with the input
information. During transmission, digital systems suffer from noise that can
introduce errors in the binary bits travelling from one system to other.
o That means a 0 bit may change to 1 or a 1 bit change to 0.

 Error Detection: Error detection is the detection of errors caused by noise or

other impairments during transmission from the transmitter to the receiver.

 Error Correction: Error Correction is the detection of errors and

reconstruction of the original error free data.
 There are Mainly Three Types of Errors Occurs
1. Single bit Error
2. Multi bits Error
3. Burst bits Error

Single bit Error Multi bits Error

Burst bits Error

Hamming Code

 Hamming code is a set of error-correction codes that can be used to detect

and correct the errors that can occur when the data is moved or stored from
the sender to the receiver.

 Redundant bits – Redundant bits are extra binary bits that are generated
and added to the information-carrying bits of data transfer to ensure that
no bits were lost during the data transfer

 The number of redundant bits can be calculated using the following

formula:

2^r ≥ m + r + 1
where, r = redundant bit, m = data bit
 Suppose the number of data bits is 7, then the number of redundant bits can
be calculated using: = 2^4 ≥ 7 + 4 + 1 Thus, the number of redundant bits= 4
Parity bits.

 A parity bit is a bit appended to a data of binary bits to ensure that the total
number of 1’s in the data is even or odd. Parity bits are used for error
detection. There are two types of parity bits

1. Even parity bit

2. Odd Parity bit
 GDI Technique
 Gate Diffusion Input (GDI) is a digital logic style that is used to implement
Boolean functions in integrated circuits. It is known for its simplicity, reduced
transistor count, and potential for low-power consumption.

 Figure the GDI logic cell consists of 4 terminals :

Inputs- G, P and N, an Output Y.
 Gate input- G is common gate input to N-MOS and
P-MOS transistors.
 Input-P is connected to source of P-MOS transistor
like VDD of basic CMOS inverter.
 Similarly Input-N is connected to source of N-MOS
transistor as ground terminal in CMOS inverter.
 Output-Y is connected to common drain terminal of
transistors.
Basic GDI Cell
 TABLE Shows
VARIOUS LOGIC FUNCTIONS USING GDI CELL
AND THEIR INPUT COMBINATIONS
 Software Required

 TANNER EDA
 Technology used:250nm
 Advantages & Applications

 Advantages

 Low Power Consumption

 Area Efficiency
 Simplified Circuit Design
 High Performance
 Applications

 Satellite Communication
 Internet of Things (IoT) Devices
 Low-Power Embedded Systems
 Sensor Networks
 Communication Protocols
 References

[1] A. P. Chandrakasan and R. W. Brodersen, ”Minimizing power consumption in digital CMOS

circuits,” in Proceedings of the IEEE, vol. 83, no. 4, pp. 498-523, April 1995.
[2] W. Al-Assadi , A.P. Jayasumana and Y.K.Malaiya, Pass Transistor Logic Design ,
International Journal of Electronics, 1991,vol.70, no.4 ,pp. 739- 749.
[3] I.S. Abu-Khater, A.Bellaour, M.I. Elmastry, Circuit Techniques for CMOS Low-Power
High-Performance Multipliers, IEEE Journal of Solid-State Circuits, vol.31, no.10, pp. 1535-
1546, October 1996.
[4] ArkadiyMorgenshtein, Alexander Fish, Israel A.Wagner Gate Diffusion Input(GDI) A
Technique for Low Power Design of Digital Circuits: Analysis and Characterization IEEE 2002,
pp. 477-480.
[5] A.P.Chandrakasan, S.Sheng and R.W.Brodersen, Low-Power CMOS Digital Design ,IEEE
Journal of Solid-State Circuits, vol.27 ,pp. 473- 484, April 1992

[6] https://www.geeksforgeeks.org/hamming-code-in-computer-network
THANK YOU…