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Lecture 1 Gates
Lecture 1 Gates
Lecture-1
DIGITAL ELECTRONICS
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Todays Lecture
Digital signals
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Introduction
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Reference: https://www.youtube.com/watch?v=G0iSEDyJKDo
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0 volts
Frequency:
Amplitude
(peak) 1
F Hz
Amplitude
(peak-to-peak)
T
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Logic Levels
Before examining digital signals, we must define logic levels.
A logic level is a voltage level that represents a defined
digital state.
Logic HIGH: The higher of two voltages, typically 5 volts
Logic LOW: The lower of two voltages, typically 0 volts
5.0 v
Logic High
Logic Level Voltage True/False On/Off 0/1
5 volts
0 volts
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Amplitude
The time it takes for a periodic signal to
repeat. (seconds) Time Time
High Low
Frequency: (tH) (tL)
A measure of the number of
occurrences of the signal per second.
(Hertz, Hz)
Rising Edge
Time High (tH):
Period (T)
The time the signal is at 5 v.
Time Low (tL):
The time the signal is at 0 v. Frequency:
Duty Cycle: 1 tH
The ratio of tH to the total period (T). F Hz DutyCycle 100%
T T
Rising Edge:
A 0-to-1 transition of the signal.
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Falling Edge:
A 1-to-0 transition of the signal.
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1.BASIC GATES
AND, and
OR Gates
NOT
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2.Universal Gates
NAND and
NOR Gates
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3.Exclusive Gate
OR (XOR) Gate
NOR(XNOR)
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AND Gate
Two or more inputs and a single output
Produces a 1 output only when all inputs
are 1s
Total number of possible combinations:
N = 2n where: n = total number of input
variables
AND Gate
AND
X
Z
Y
Z = X & Y
Truth Table
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AND Gate
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OR Gate
Produces a 1 output if any of its
inputs are 1s
Performs basic operation of
addition
Can have any number of inputs
greater than one
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OR Gate
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OR Gate
OR
X Y Z
X 0 0 0
Z 0 1 1
Y 1 0 1
1 1 1
Z = X | Y
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NOT Gate
Referred to as an inverter
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NOT X Y
X Y 0 1
1 0
Y = ~X
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NOT
X ~X ~~X = X
X ~X ~~X
0 1 0
1 0 1
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NAND Gate
Combination of an inverter and an
AND gate (NOT-AND)
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NAND Gate
NAND
X Y Z
X 0 0 1
0 1 1
Z
1 0 1
Y 1 1 0
Z = ~(X & Y)
nand(Z,X,Y)
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NAND Gate
NOT-AND
X Y W Z
X 0 0 0 1
W 0 1 0 1
Z
1 0 0 1
Y 1 1 1 0
W = X & Y
Z = ~W = ~(X & Y)
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NAND Gate
X Z X Z
=
Y Y
Z = ~(X & Y) Z = ~X | ~Y
X Y W Z X Y ~X ~Y Z
0 0 0 1 0 0 1 1 1
0 1 0 1 0 1 1 0 1
1 0 0 1 1 0 0 1 1
1 1 1 0 1 1 0 0 0
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NOR Gate
Combination of an inverter and an
OR gate (NOT-OR)
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NOR Gate
NOR
X Y Z
X 0 0 1
Z 0 1 0
Y 1 0 0
1 1 0
Z = ~(X | Y)
nor(Z,X,Y)
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NOR Gate
NOT-OR
X Y W Z
X 0 0 0 1
W
Z 0 1 1 0
Y 1 0 1 0
1 1 1 0
W = X | Y
Z = ~W = ~(X | Y)
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NOR Gate
X X
Z Z
Y Y
Z = ~(X | Y) Z = ~X & ~Y
X Y Z X Y ~X ~Y Z
0 0 1 0 0 1 1 1
0 1 0 0 1 1 0 0
1 0 0 1 0 0 1 0
1 1 0 1 1 0 0 0
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Exclusive OR
Exclusive OR gate (XOR)
Has only two inputs
Produces a 1 output only if both
inputs are different
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Exclusive-OR Gate
XOR
X Y Z
X
Z 0 0 0
Y
0 1 1
Z = X ^ Y 1 0 1
xor(Z,X,Y)
1 1 0
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Exclusive-NOR Gate
XNOR
X Y Z
X
Z 0 0 1
Y
0 1 0
Z = ~(X ^ Y)
1 0 0
Z = X ~^ Y
1 1 1
xnor(Z,X,Y)
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Multiple-input Gates
Z1 Z2
Z3 Z4
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Z1
Multiple-input OR Gate
Z2
Z3
Z4
Summary
An AND gate produces a 1 output when
all of its inputs are 1s
An OR gate produces a 1 output if any of
its inputs are 1s
A NOT gate converts the input state to
an opposite output state
A NAND gate produces a 1 output when
any of the inputs are 0s
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Summary
A NOR gate produces a 1 output only
when both inputs are 0s
Assignment
1.What do you mean by Universal Gates?
Implement AND Gate by using universal Gates.
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