All Processes

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Figure1 : Stages of

semiconductor
production.
Diffusion
Doping
 Doping is the process that puts specific amounts of dopants in
the wafer surface through openings in the surface layers.
 Thermal diffusion is a chemical process that takes place when the
wafer is heated (1000 C) and exposed to dopant vapor. In this
process the dopants move to regions of lower concentration.
 Doping Control is critical in MOS device scaling. (Scaling down
the gate length requires equal scaling in doping profile)

Ion source
Thermal
Ion implantation
diffusion
Diffusion
Introduction of impurities into selected regions of wafers to
form junctions.

Alter the type of conductivity in Si.

Take place at 900 to 11000C.

Impurity atoms diffuse into the lattice because of their


tendency to move from region of high concentration to low
concentration.
Thermal diffusion – general comments

Schematic diagram of a furnace for diffusing impurities (e.g.


phosphorus) into silicon.
Dopant diffusion sources
Solid Source Diffusion System
Liquid Source Diffusion System
Gaseous Source Diffusion System
Constant surface concentration: diffusion
depth

Log scale Linear scale


Plots of C(x,t)/Cs vs diffusion depth x(µm) under constant surface
concentration conditions for three different values of √Dt . This could
mean either a change of temperature (i.e D(T)) or time, t.
Profile: Complementary Error function
Pre deposition/Constant Source Diffusion
Constant total dopant (number) diffusion:
Impurity profile
Log scale Linear scale

Three impurity profiles carried out under constant total dopant diffusion
conditions. Note the reduction in the surface concentration C(0,t) with time,
and the corresponding rise in the bulk density.
It is also called as drive-in diffusion/ limited source diffusion

Profile: Gaussian
Advantages of Ion Implantation

Disadvantage:
Equipment is highly sophisticated and expensive
Annealing at high temp. is needed due to semiconductor damage
Equipment
An ion implanter is a high voltage particle accelerator producing a high-
velocity beam of ions which can penetrate the surface of silicon target
wafers. Components:
 Ion source
 Mass spectrometer
 High voltage accelerator
 Scanning system
 Target chamber
Distribution of Ions in Si Implanted at 200 keV
Etching
The Etch Process

The properties of the etch process should be:


• Follow the photolithography step
• Remove selected materials from wafer surface
• Clean the wafer surface
Etching Process
Wet Etch Process - Examples
Wet Etch Process - Examples
Wet Etch Process - Examples
Wet Etch Process

Wet Etch Process Steps Wet Etchants


• Etch • Acetic Acid HC2H3O2
• Rinse • Hydrofluoric Acid HF
• Dry • Ammonium Fluoride NH4F
• Phosphoric Acid H3PO4
Key Wet Etch Parameters
• Etchant concentration • Nitric Acid HNO3

• Temperature of etchant
Wet Etch Limitations
Wet Etch in an Immersion Tank

Rinse in an Immersion Tank

Dry in Spin-Rinse-Dryer
Dry Etch
Chemical reaction or physical etch between gas.etchants and surface
material on wafer:  Dry etching methods
 Glow discharge methods
Dry physical etching (Sputter etching)
Plasma assisted etching
o Dry chemical etching (Plasma etching)
o Reactive ion etching (RIE)
 Ion beam methods
Ion mlling
Reactive ion beam etching
Chemical assisted ion milling
 Common materials to dry etch
 Si, SiO2, Si3N4, Al, W, Ti, TiN, TiSi2, Photoresist
 Difficult materials to dry etch
 Fe, Ni, Co, Cu, Al2O3, LiNbO3, etc.
Dry Etch

Characteristics of Dry Etch Process


• Highly selective
• Anisotropic etch
• For use of features smaller than 3 microns
• Expensive equipment
• Limited human exposure to hazardous chemicals
• RF Power safety risks
Dry Etch Process
Physical Etch
Also referred to as ion beam etching, sputtering,
ion .milling
Ions bombard wafer surface causing molecules
to .sputter off the surface
- Argon introduced into RF Power Chamber
Advantages
- Low level of undercutting
- Anisotropic etch
Disadvantages
- Low selectivity rate
- Requires high level of RF Power
Sputter etching
In this process all of the electrical energy, usually RF, is applied
to the substrate.
Physically bombard the films to be etched with energized
chemically inert ions or atoms.
Material is removed by ion bombardment of the substrate. This
process is most often used to pre-clean substrates prior to
deposition.
Glow discharge is used to energize chemically inert ions or
atoms (e.g., Ar)
Highly anisotropic etching
– Damage to underlying material => may change device properties
– Rarely used in VLSI
RF-powered Plasma Etch System

RF-powered plasma etch system


Oxidation

⮚ The goal of oxidation is to grow high quality oxide


layer on a silicon substrate.

⮚ Process will be repeated multiple times throughout


the fabrication process.
Functions of oxide layer
Passivation:
⮚Physically protects wafers from scratches and particle contamination
⮚Traps mobile ions in oxide layer

Masking:
⮚ During diffusion, ion implantation and etching

Insulating Material: Dielectric Material:


⮚Thinox ⮚FOX
Function of Oxide Layers
Insulating Material
• Gate region
- Thin layer of oxide
- Allows an inductive charge to pass between gate
metal and silicon
Function of Oxide Layers (4)
Dielectric Material
• Insulating material between metal layers
- Field Oxide
Thermal Oxidation Process
Wet Thermal Oxidation
Wet Thermal Oxidation Techniques
Bubbler
Oxide Growth Mechanism
⮚ Deal and Grove (1965) developed ‘Linear Parabolic Model’ to demonstrate
how silicon dioxide is grown on silicon substrate during oxidation

⮚ Linear Parabolic Model:


1. Linear (first) stage of oxidation
✔ Chemical reaction between Si and oxidants at wafer surface
✔ Reaction limited by number of Si atoms available to react with oxidants
and reaction rate constant
✔ During the first 5000A of oxide growth, the oxide grows linearly with
time.
✔ Growth rate begins to slow down as oxide layer grows.
2. Parabolic Stage
✔ Begins when 10000A of oxide has been grown on Si
✔ Si atoms are no longer exposed directly to oxidants
✔ Oxidants diffuse through oxide to reach Si
✔ Reaction limited by diffusion rate of oxidant
𝟐
𝒙 𝒊 + 𝑨 𝒙𝒊
𝝉=
𝑩
Aim: Use nanohub platform to simulate and analyze the
Oxidation process for various process parameters and wafer
specifications.

Problem Statement:
Simulate the oxidation process with Deal - Groove model for different
conditions (eg. Oxidation type, orientation, time, temperature, initial
thickness etc.) and comment on the results obtained. Determine the
relation between B/A ratio of (111) and (100) plane.

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