INSTRUCTION CYCLE

DONE BY:
HARSHAN
JEYANTH
HILLARY JOHN
 INSTRUCTION CYCLE
● In computer organization, an instruction cycle, also known as a fetch-
decode-execute cycle, is the basic operation performed by a central
processing unit (CPU) to execute an instruction.

● Each instruction cycle is divided into sub cycles or phases.

 STEPS INVOLVED
● FETCH

● DECODE

● READ THE EFFECTIVE ADDRESS FROM MEMORY ..

● EXECUTE
 FETCH
● In the fetch cycle, the CPU retrieves the instruction from memory.
● Initially the sequence counter is 0
● When SC is zero, the timing pulse is start with T0 . At T0 , program counter will be placed in
the address register.
● During T1 , T1 :IR M[AR], The contents of Memory Address is placed in the Instruction
Register. After Memory is placed in the IR, PC is incremented. Now the IR holds the opcode .
● The PC is then incremented to point to the next instruction in memory.
 DECODE
● During the timing pulse T2 , decode operation is performed. Decode
the Opcode (12-14) in the IR. AR IR (0-11) I IR (15) .
 READ THE EFFECTIVE ADDRESS

● D7 bit is decide the type of instruction.

● If D7 is 1, register or I/O reference instructions are carried out.

● If D7 is 0, memory-reference instructions are used.

 EXECUTE
● When Timing signal is at T3,The decoded instruction is executed.

● .This may involve arithmetic or logical operations, data movement, or control flow
changes.

● If the mode bit is direct, Timing signal T3 is utilized.

● If the mode bit is Indirect, Timing signal T4 is utilized

THANK YOU