CS353

Computer Architecture

Lecture 12- Processor Control

1
Single Cycle Processor Datapath
0

4 Result 1
Result clk Sh. Add
Left
Add 2 Single-Cycle Design
Read
Read reg. num A
reg num A Read address
Read reg data A
Read address
Read reg num B Data Memory
PC Zero Read data
Instruction [31-0] Registers 1
Result Write address
Write reg num
Instruction Read reg data B 0 0
Write data
Memory Write reg data 1
clk
16 sign
extend
32
clk

2
 The ALU
The ALU is stuck right in the middle of everything...
It must:
Add, Subtract, And, or Or for arithmetic instructions
Subtract for a branch on equal
BInvert CarryIn Operation
Subtract and set for a SLT
A
Add for a memory access 0

Function BInvert Op Carry Result 1

Function BInvert Op Carryinin Result Result
And
And 00 00
00 00 RR ==AA•• BB B 0
Or
Or 00 01
01 00 RR ==AAÚÚ BB 1
+ 2

Add
Add 00 10
10 00 RR ==AA++ BB Less 3
Subtract
Subtract 11 10
10 11 RR ==AA-- BB
SLT
SLT 11 11
11 11 RR == 11 ififAA<< BB
CarryOut
00 ififAA³³BB

Always the same: Combine into one signal called “sub”

3
 Books Table (page 301)

4
 Setting the ALU controls
The instruction Opcode and Function give us the
info we need
For R-type instructions, Opcode is zero, function code
determines ALU controls
– For I-type instructions, Opcode determines ALU controls
New
New control
control signal:
signal: ALUOp
ALUOp is
is 00
00 for
for memory,
memory, 01
01 for
for Branch,
Branch, and
and 10
10 for
for R-type
R-type

Instruction Opcode ALUOp Funct. Code ALU action ALU control

sub op
add R-type 10 100000 add 0 10
sub R-type 10 100010 subtract 1 10
and R-type 10 100100 and 0 00
or R-type 10 100101 or 0 01
SLT R-type 10 101010 SLT 1 11
load word LW 00 xxxxxx add 0 10
store word SW 00 xxxxxx add 0 10
branch equal BEQ 01 xxxxxx subtract 1 10
5
 Controlling the ALU
AluOp is determined by Opcode - For
For ALUOp
ALUOp == 0000 or
or 01,
01,
separate logic will generate ALUOp function
function code
code is
is unused
unused
ALUOp F5 F4 F3 F2 F1 F0 Function ALU Ctrl
00 x x x x x x Add 0 10 ALUOp1
F1 A2
x1 x x x x x x Sub 1 10
1x x x 0 0 0 0 Add 0 10
ALUOp0
1x x x 0 0 1 0 Sub 1 10 A1
F2
1x x x 0 1 0 0 And 0 00
1x x x 0 1 0 1 Or 0 01 F3 A0
1x x x 1 0 1 0 SLT 1 11 F0

Since
Since ALUOp
ALUOp cancan only
only
be
be 00,
00, 01,
01, or
or 10,
10, we
we AA6-input
6-input truth
truth table
table --
don’t
don’t care
care what
what ALUOp
ALUOp00 use
use standard
standard
is minimization
minimization techniques
techniques
is when
when ALUOP
ALUOP11 isis 11

6
 Decoding the Instruction - Data
The instruction holds the key to all of the data signals

R-type 31-26 25-21 20-16 15-11 10-6 5-0

Opcode RS RT RD ShAmt Function
To ctrl Read Read Write Not To ALU
logic reg. A reg. B reg. Used Control

Memory,
31-26 25-21 20-16 15-0
Branch
Opcode RS RT Immediate Data
To ctrl Read Write Memory address or Branch Offset
logic reg. A reg./
Read
reg. B
One problem - Write register number must come from two different places.

7
 We can decode the data
Instruction Decoding simply by dividing up the
instruction bus

4 Opcode: [31-26]
Result 1
Result Sh. Add
Left
Add Op:[31-26]
Ctrl 2

Rs:[25-21] Read
Read reg. num A
reg num A Read address
Rt:[20-16] Read reg num B A
Read reg data
Read address
Data Memory
PC Zero Read data
Instruction [31-0] Registers 1
0 Result Write address
Write reg num
Instruction Read reg data B 0 0
Rd: 1 Write data
Memory Write reg data 1
[15-11]

Read Reg A: Rs Imm:

[15-0] 16 sign 32
Read Reg B: Rt extend

Write Reg: Either Rd or Rt

Immediate Data: [15-0]

8
 Control Signals
0

4 Result 1
Result Load,R-type Sh. Add BEQ and zero
Left PCSrc
Add Op:[31-26]
MemWrite Load
Ctrl RegWrite 2
Store
Rs:[25-21] ALUSrc MemToReg
Read
Read reg. num A
reg num A Read address
Rt:[20-16] Read reg data A
Read reg num B Data Memory
PC Read address
Registers
Memory Zero Read data 1
Instruction [31-0] Result Write address
0
Write reg num
Instruction Read reg data B 0 0
Rd: 1 Write data
Memory [15-11] Write reg data 1

RegDest
Imm:
R-type [15-0] 16 sign 32
ALU 00: Memory MemRead
extend
Ctrl 01: Branch Load
10: R-type
FC:[5-0] 6
ALUOp

ALU Control - A function of: ALUOp and the function code