Professional Documents
Culture Documents
Current Sources, Current Sinks and Current Mirrors
Current Sources, Current Sinks and Current Mirrors
+
+
(
=
1
2
2 1
1 2
1
1
DS
DS
i
o
V
V
L W
L W
i
i
If V
DS1
= V
DS2
then
(
=
2 1
1 2
L W
L W
i
i
i
o
Matching Accuracy of Current Mirrors
Layout Technique to Remove Layout Error
( ) | | r i r v g v g i v
out
ds sb mb gs m out out
+ + =
( ) ( )
ds m ds mb ds m ds
out
out
out
r r g 1 r g r g r r
i
v
r ~ + + + = =
( )
2 m 1 m 3 ds 3 m 1 ds
2 m 2 ds
3 ds 3 m 1 ds 1 m 2 ds
out
g g if r g r
g r
r g r g r
r = ~ =
WILSON CURRENT MIRROR
This modification to the Simple Current mirror
does ensure an increased output impedance, but
does not ensure V
DS1
= V
DS2
. V
min
obtained in
this configuration is the sum of the voltage,
V
DS1
(sat) and V
DS3
(sat), the minimum drain to
source voltage required to keep M3 and M1 in
saturation. Defining V
ON
= V
GS
V
TH
, and
assuming that all transistors have same W/L
ratio, we have V
DS1
= V
GS1
= V
ON
+ V
TH
and
V
DS3
(min) = V
ON
and V
min
= 2V
ON
+ V
TH
.
MODIFIED WILSON CURRENT MIRROR
CASCODE CURRENT MIRROR
REGULATED CASCODE CURRENT MIRROR
If all transistors have the same size, V
GS2
= V
DS1
=
V
GS
= V
DS4
, giving us a very good match in mirroring.
CURRENT MIRROR WITH LOW V
min
and
GOOD MIRRORING PROPERTY
We see that in the Cascode
Current Mirror, the voltage
V
GG2
was obtained as 2V
GS
and hence we had a V
min
of
2V
GS
V
TH
= 2V
ON
+V
TH
.
However if we can obtain
V
GG2
= 2V
ON
+ V
TH
, V
min
can
be reduced to 2V
ON
.
WIDE RANGE CASCODE CURRENT MIRROR
Current Mirror Accuracy Output impedance V
min
Simple Poor r
ds
V
ON
Wilson Poor 2V
ON
+ V
TH
Improved Excellent 2V
ON
+ V
TH
Cascode Excellent 2V
ON
+ V
TH
Regulated Cascode Good 2V
ON
+ V
TH
Cascode Excellent 2V
ON
2
ds m
r g
2
ds m
r g
2
ds m
r g
3
ds
2
m
r g
2
ds m
r g
COMPARISON OF VARIOUS CURRENT
MIRROR ARCHITECTURE