BASIC PRINCIPLES OF

TRANSISTOR AMPLIFIERS
.
19ECE201
Analog Electronic Circuits
Department of ECE
Amrita School of Engineering
Bengaluru.
BASIC PRINCIPLES OF TRANSISTOR AMPLIFIERS
• 7.1 Basic Principles
• 7.1.1 The Basis for Amplifier Operation
• 7.1.2 Obtaining a Voltage Amplifier
• 7.1.3 The Voltage-Transfer Characteristic (VTC)
• 7.1.4 Obtaining Linear Amplification by Biasing the Transistor
• 7.1.5 The Small-Signal Voltage Gain

2
 5.4.1. Obtaining a example of transconductance
amplifier
Voltage Amplifier
• In section 1.5 of text, we learned that
voltage controlled current source
(VCCS) can serve as
transconductance amplifier.
• the following slides (with blue tint) are a
review
• Q: How can we translate current
output to voltage?
• A: Measure voltage drop across
function
load
resistor. vout
of input
vG
 
supply

Figure 5.27: (a) simple MOSFET
(eq5.30) vDS  vDD  iD RD
amplifier with input vGS and output vDS
5.4.2. Voltage Transfer Characteristic
• voltage transfer characteristics (VTC) –
plot of out voltage vs. input
• three regions exist in VTC
• vGS < Vt  cut off FET
• vOV = vGS – Vt < 0
• ID = 0
• vDS ??? vOV
• vout = vDD
• Vt < vGS < vDS + Vt  saturation
• vOV = vGS – Vt > 0
• ID = ½ kn(vGS – Vt)2
• vDS >> vOV
• vout = VDD – IDRD
Figure 5.27: (b) the voltage transfer • vDS + Vt < vGS < VDD  triode
characteristic (VTC) of the amplifier • vOV = vGS – Vt > 0
from previous slide • ID = kn(vGS – Vt – vDS)vDS
 cutoff FET cutoff AMP

5.4.2. Voltage Transfer Characteristic

• Q: What observations may be
drawn?
• A: Cutoff FET represents
transistor blocking, cutoff
AMP represents vout = 0
• A: As vGS increases…
• vDS (effectively)
decreases
• iD increases
• vout decreases
nonlinearly
Figure 5.27: (b) the voltage transfer
• gain (G) decreases
characteristic (VTC) of the amplifier • A: Once vDS > vDD, all power
from previous slide is dissipated by resistor RD
5.4.2. Voltage Transfer Characteristic
Q: How do we define vDS in terms of
vGS for saturation?
 thisis equation
  is simply
  ohm's
 law/ KVL 
1 2
(eq5.32) vDS  VDD   kn vGS  Vt   RD
 2      
iD

2kn RDVDD  1  1
(eq5.33) VGS B  Vt 
kn RD

Q: How do we define point B –

boundary between saturation and
Figure 5.27: (b) the voltage transfer
triode regions?
characteristic (VTC) of the amplifier
from previous slide
 This equation differs from (5.32) because
5.4.3. Biasing the MOSFET to Obtain it considers dc component only.
Linear Amplification
  thisequation
  issimply
 ohm's
 law  
1 2
(eq5.34) VDS  VDD   kn VGS  Vt   RD
   2       
• Q: How can we linearize VTC? Vsource ID RD

• A: Appropriate biasing technique

• A: Dc voltage vGS is selected to obtain
operation at point Q on segment AB
• Q: How do we choose vGS?
• A: Will discuss shortly…

Figure 5.28: biasing the MOSFET

amplifier at point Q located on
segment AB of VTC
 5.4.3. Biasing the MOSFET to Obtain
Linear Amplification
  thisequation
  issimply
 ohm's
 law  
1 2
(eq5.34) VDS  VDD   kn VGS  Vt   RD
   2       
• bias point / dc operating pt. (Q) – Vsource ID RD

point of linearization for MOSFET

• Also known as quiescent point.
• Q: How will Q help us?
• A: Because VTC is linear near Q, we
may perform linear amplification of
signal << Q

Figure 5.28: biasing the MOSFET

amplifier at point Q located on
segment AB of VTC
5.4.3: Biasing the
MOSFET to Obtain
Linear
Amplification

• bias point / dc operating pt. (Q) = point of linear amplification

linearization for MOSFET around Q in
• also known as quiescent point
saturation region
• Q: how will Q help us?
• because VTC is linear near Q, we may perform
linear amplification of signal << Q

Figure 5.28: biasing the MOSFET amplifier at

point Q located on segment AB of VTC
Oxford University Publishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith
(0195323033)
5.4.3. Biasing the MOSFET to
Obtain Linear Amplification

• Q: How is linear gain achieved?

• step #1: Bias MOSFET with dc
voltage VGS as defined by (5.34)
• step #2: Superimpose amplifier v GS t   VGS  v gs t 
input (vgs) upon VGS. 
• step #3: Resultant vds should be v ds tt  v gs  
linearly proportional to small-
signal component vgs.
 Figure 5.29: The MOSFET amplifier with a small
Q: How is linear gain time-varying signal vgs(t) superimposed on the dc
bias voltage vGS. The MOSFET operates on a short
achieved? almost-linear segment of the VTC around the bias
point Q and provides an output voltage vds = Avvgs

As long as vgs(t) is small, its effect

on vDS(t) will be linear –
facilitating linear amplification.
Q: How is linear gain
achieved?

dvDS
(eq5.35) Av 
• step #4: Note if vgs dvGS vGS VGS
  
is small, output vds means that
vgs is small

will be nearly    action:

  replace
  vDS with
 (5.32)
   
linearly
proportional to it. (eq5.35) Av 

d VDD  12 kn vGS  Vt  RD
2

• Slope will be dvGS
vGS VGS
constant.
 action:
  simplify
 
(eq5.36) Av  kn VGS  Vt  RD
action: replace
with VOV
   
(eq5 .3University
Oxford v  knVOV RD
7) APublishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith
(0195323033)
5.4.4. Small-Signal Voltage
Gain

• Q: What observations can dvDS

(eq5.35) Av 
be made about voltage dvGS vGS VGS
gain?   
means that
vgs is small

• A: Gain is negative.    action:

  replace
  vDS with
 (5.32)
   
• A: Gain is proportional to:
(eq5.35) Av 

d VDD  12 kn vGS  Vt  RD
2

• load resistance (RD) dvGS
• transistor conductance vGS VGS

parameter (kn)  action:

  simplif
 y 
(eq5.36) Av  kn VGS  Vt RD
• overdrive voltage (vOV) action: replace
with VOV
   
(eq5.37) Av  knVOV RD
Oxford University Publishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith
(0195323033)
 5.4.4. Small-Signal Gain

• Equation (5.38) is another version of

(5.37) which incorporates (5.17).
• It demonstrates that gain is ratio of: (eq5.37) Av  knVOV RD
action:
• voltage drop across RD incorporate
2
(5.17) iD  12 knvOV
• half of over voltage    
 ID RD 
(eq5.38) Av    
 VOV /2 
 This does not mean that
5.4.4. Small-Signal Gain output may be 10x supply
(VDD).
For example, 0.13mm CMOS
technology with VDD = 1.3V
• Q: How does (5.38) relate to physical devices?
yields maximum gain of
• A: For modern CMOS technology, vOV is 13V/V.
usually no less
than 0.2V.
• A: This means that max achievable gain is
approximately 10VDD.

   VDD   
 max ID RD 
max  Av       10VDD
 V OV /2 
 
 0.1V Oxford University Publishing 
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith
(0195323033)
6.4. Applying the BJT in Amplifier Design
• Similar to the MOSFET configuration, an amplifier may be
designed by transistor and series resistance.
• However, it is necessary to model the voltage transfer
characteristic (VTC).
• Appropriate biasing is important to ensure linear gain,
and appropriate input voltage swing.
• Small-signal model is employed to model the amp’s operation.
Figure 6.32: Biasing the BJT amplifier at a point Q located on the active-mode
segment of the VTC.
 Oxford University Publishing
Microelectronic Circuits by Adel S. Sedra and Kenneth C. Smith
(0195323033)
7.1.1 The Basis for Amplifier Operation
 7.1.1 The Basis for Amplifier Operation

MOSFET BJT
• Amplification-Saturation region • Amplification-Active region
7.1.2 Obtaining a Voltage Amplifier
 7.1.2 Obtaining a Voltage Amplifier

MOSFET BJT
• Transconductance amplifier- • vCE= VCC−iCRC
Voltage Amplifier
• vDS= VDD−iDRD

(a) An NMOS amplifier and (b) its VTC; and (c) an npn
amplifier and (d) its VTC.
7.1.3 Voltage Transfer Characteristics
7.1.3 Voltage Transfer Characteristics
7.1.4 Obtaining linear amplification by
biasing the transistor
 Figure The MOSFET amplifier with a small time-
Q: How is linear gain varying signal vgs(t) superimposed on the dc bias
voltage vGS. The MOSFET operates on a short
achieved? almost-linear segment of the VTC around the bias
point Q and provides an output voltage vds = Avvgs

As long as vgs(t) is small, its effect

on vDS(t) will be linear –
facilitating linear amplification.
7.1.5 Small Signal Voltage Gain