8051 - timers

8051 - timers

• The 8051 comes equipped with two timers, both of which may be
controlled, set, read, and configured individually.
• The 8051 timers have three general functions:
1. Keeping time and/or calculating the amount of time between
events,
2. Counting the events themselves, or
3. Generating baud rates for the serial port.
 8051 - timers

A 3-bit counter would not be very useful in a microcomputer so it is more

typical to find 8-bit and 16-bit counter circuits.
 8-bit COUNTER OPERATION

• The 8051 comes equipped with two timers, both of which may be
controlled, set, read, and configured individually.
• Since this is a modulo-8 set up we are concerned with 256 numbers
in the range 0 to 255 (28 =256).
• The counter will count in a continuous sequence as follows:
 How does a timer count
• A timer always counts up. It doesn't matter whether the timer is
being used as a timer, a counter, or a baud rate generator.
• A timer is always incremented by the microcontroller.
• Programming Tip: Some derivative chips actually allow the
program to configure whether the timers count up or down.
However, since this option only exists on some derivatives It is
only mentioned here in the event that you absolutely need a
timer to count backwards, you will know that you may be able to
find an 8051-compatible microcontroller that does it.
• When a timer is used to measure time it is also called an
"interval timer" since it is measuring the time of the interval
between two events.
 8051 - timers

• Supposing we were to initialize this Timer/Counter with a number,

say 252, then the counter would overflow after just four event
pulses, i.e.:

An 8-bit counter can count 255 events before overflow, and overflows on
the 256th. event. When initialized with a predefined value of say 252 it
overflows after counting just four events. Thus the number of events to
be counted can be programmed by preloading the counter with a given
number value.
 8051 - timers
• The 8051 internally divides the processor clock by 12. If a 12 MHz.
processor clock is used then a 1 MHz. instruction rate clock, or a
pulse once every microsecond, is realized internally within the chip.
If this 1 microsecond pulse is connected to a Timer/Counter input.

• In place of an event input, then the Timer/Counter becomes a timer

which can delay by up to 255 microseconds.

• There is a clear difference between a timer and a counter.

• The counter will count events, up to 255 events before overflow, and
the timer will count time pulses, thus creating delays up to 255
microseconds in our example.

• the counter acts as an event counter and the timer acts as an

interval timer.
 8051 - timers

• If the timer is initialized to zero it will count 256 microseconds before

overflow.

• If the timer is initialized to a value of 252, for example, it will count

just 4 microseconds before overflow.

• Thus this timer is programmable between 1 microsecond and 256

microseconds.
 How long does a timer take to count
• when a timer is in interval timer mode (as opposed to event counter
mode) and correctly configured, it will increment by 1 every machine
cycle.
• a single machine cycle consists of 12 crystal pulses

11,059,000 / 12 = 921,583
• Hence for a crystal frequency of 11.0592 the timer will be
incremented 921,583 times per second
• Unlike instructions--some of which require 1 machine cycle, others
2, and others 4--the timers are consistent.
• They will always be incremented once per machine cycle. Thus if a
timer has counted from 0 to 50,000 you may calculate:
50,000 / 921,583 = .0542 seconds
• Thus to implement the delay of 1 sec the above the timer has to
count from 0 to 50,000 for 18.45 times.
HOW DO WE PROGRAM THE 8-BIT TIMER/COUNTER?

1. Configure the Timer/Counter as a TIMER or as a

COUNTER.

2. Program the Timer/Counter with a value between 0

and 255.

3. Enable and disable the Timer/Counter.

4. How to know when the timer has overflowed –

interrupt vs. polling.
 Timer SFRs
Name SFR
• The two timers share two SFR
Description Address
SFRs (TMOD and TCON)
which control the timers,
and each timer also has Timer 0
TH0 8Ch
two SFRs dedicated High Byte
solely to itself (TH0/TL0
and TH1/TL1). Timer 0
TL0 8Ah
• SFR has a numeric Low Byte
address Timer 1
TH1 8Dh
High Byte
Timer 1
TL1 8Bh
Low Byte
Timer
TCON 88h
Control
Timer
TMOD 89h
Mode
 Timer SFRs

The 16 bit register of T0 / T1 is accessed as

low byte and high byte (TH0 / TH1)

THO TLO

DB15 DB0
 Timer SFRs
• When you enter the name of an SFR into an assembler, it internally
converts it to a number. For example, the command:

MOV TH0,#25h is same as MOV 8Ch,#25h.

TMOD register
Gate: Gating control when set timer/counter is enabled only while
the INTx pin is high and TRx pin is set. When cleared, the timer is
enabled whenever the TRx control bit is set.

C / T :Timer / Counter selected cleared for timer application

(c input from interval system clock). Set for counter operation( input
from Tx input pin).

M1, M0 MODE BITS

M1 M0 MODE OPERATING MODE

0 0 0 13 bit timer mode

0 1 1 16 bit timer mode
1 0 2 8 bit timer mode
1 1 3 split timer mode
•Influence of gate:

It is to start or stop the timer, using hardware or software

control.

SETB TR1, CLR TR1 for timer 1 and SETB TR0,CLR

TR0 for timer 0 instruction start or stop timers as long as
gate =0 in TMOD register.
Mode 0:
This mode is compatible for MCS 48 family. The 13 bit
counter can hold values between 0000 to 1FFF in TH and
TL registers. Therefore, when the timer reaches its
maximum of 1FFF it rolls over to 0000 and TF is raised.
Mode 1:

The characteristics of this mode are as follows:

1) It is a 16 bit timer. It allows values of 0000 to FFFFH into timer
register TH and TL.

2) After TH and TL are loaded with 16 bit initial value. The timer must
be started. This is done by SETB TR0 for SETB TR1 for T1.

3) After timer is started, it starts to count up. It counts up to FFFFH .

when it rolls over from FFFFH to 0000, it sets a flag bit timer flag(TF).
This flag can be monitored. When it is raised, one option is to stop the
timer with the instruction CLR TR0 or CLR TR1.

4) After the timer reaches its limit and rolls over, in order to repeat the
process the register TH and TL must be reloaded with the original
value and TF must be reset to 0.
Xtal 12 TH TL TF
osc

TR TF goes high Over flow

C/T’ When FFFF flag
Mode 1 programming :

To generate a time delay, using time mode, the following steps are
taken:

 load the TMOD value register indicating which timer(T0 0r T1) is to

be used and which timer mode is selected.

 Load register TL and TH with initial count values.

 Start the timer.

 Keep monitoring the status of timer flag (TF). Come out of the loop,
when TF becomes HIGH.

 Stop the timer.

 Clear the TF flag for the next count.

 Go back to step 2.
 ORG 0H
MOV TMOD,#01H
HERE: MOV TL0, #0F2 H 2
MOV TH0, #OFFH 2
CPL P1.5 1
ACALL DELAY 2
SJMP HERE 2
DELAY: SETB TR0 1
AGAIN: JNB TF0,AGAIN 14
CLR TR0 1
CLR TF0 1
RET 1

27
In the above program, observe the following:

 TMOD is loaded.

 FFF2H is loaded into TH0-TL0.

 P1.5 is toggled for the high and low portions of the pulse.

 The DELAY subroutine , timer0 is started by SETB TR0

instruction.

 Timer0 counts up with the passing of each clock. As timer

counts up, it goes through FFF3, ….., FFFF, 0000 states . now
TF0 becomes HIGH.

T0 is stopped by the instruction CLR TR0.And the process is

repeated.
FFF2 FFF3 FFF4 FFFF 0000

TF=0 TF=0 TF=0 TF=0 TF=1

Delay calculation:
[( FFFF – YYXX) +1] * 1.085 s
The delay calculations for the above example are as follows.
for the entire period,
T=2*27*1.085s=58.59s

Problem: Find the delay generated by T0 in the following code.

CLR P2.3
MOV TMOD,#01H
HERE: MOV TL0,#3EH
MOV TH0,#0B8H
SETB P 2.3
SETB TR0
AGAIN: JNB TF0, AGAIN
CLR TR0
CLR TF0
CLR P2.3
 ORG 0000 H
MOV TMOD, #10 H
AGAIN: MOV TL1, #34 H
MOV TH1, #76 H
SETB TR1
BACK: JNB TF1, BACK
CLR TR1
CPL P1.5
CLR TF1
SJMP AGAIN
Explanation:

The above program generates a square wave on pin

P1.5 continuously using timer 1 for a time delay.

Find the frequency of the square wave if

XTAL=11.0592MHZ .

In your calculation, do not include the OVERHEAD

due to instructions in the loop.

Since FFFFh-7634h=89CBh+1=89CCh and

89CCH=35276 clock count and
35276X1.0875s=38.274ms
Problem :

To find values of TH and TL registers, once the amount of time

delay is known.
Assuming that XTAL = 11.0592Mhz write a program to generate a
square wave of 2Khz frequency on pin P1.5.

Assuming XTAL= 11.0592 MHZ, the following steps are to be followed.

1) Divide the desired time delay by 1.085s.

2) Perform 65536-n where n is the decimal value we got in step1.
3) Convert the result of step-2 to hex.
4) Set TL and TH registers accordingly.
Assume that XTAL =11.0592 MHZ, what value do
we need to load into the timer’s register, to have a
delay of 5ms; show the program for timer 0 to
create a pulse width of 5 ms on P2.3.

Step 1: 5 ms / 1.085 s= 4608 clocks.

2. 65536 – 4608 = 60228.
3. EE00H
4. TH : EE & TL :00H.
 ORG 0H
CLR P2.3
MOV TMOD,#01H
HERE: MOV TL0, #00H
MOV TH0, #0EEH
SETB P2.3
SETB TR0
AGAIN: JNB TF0,AGAIN
CLR TR0
CLR TF0.
SJMP HERE.
 MODE -2 of timer – AUTO RELOAD mode

Xtal 12 TL TF
osc

TR Over flow flag

C/T’
TH
TF goes high
when
FFFF
The characteristics of mod 2 are as follows:
1. It is an 8-bit timer and it allows values of 00h to FFH.
2. After TH is loaded with the 8 bit value,8051 gives a copy of it to TL.
Then the timer must be started. This is done by the instruction ‘SETB
TR0’ for T0 and ‘SETB TR1’ for T1.
3. After the timer is started; it starts to count up by incrementing the TL
register. It counts up until it reaches its limit of FFH. When it rolls over
from FFH to 00 H; it sets high the TF(timer flag). If we are using timer 0,
TF0 goes high. If we are using T/C TF1 is raised.
4. When the TL register roll from FFH to 0 and TF is set to 1. TL is
reloaded automatically with the original value kept at TH register. To
repeat the process, we must simpler clear TF and automatically reloads
the originally values.
5. In auto reload, TH is loaded with the initial count and a cop0y of it is
given to TL. This reloading leaves TH unchanged still holding a copy of
original value.
 Mode 2 programming:

NAME EXAMPLE14
ORG 0000H
MOV TMOD,#2H ;
MOV TH0,#0H
AGAIN: MOV R5,#250
ACALL Delay
CPL P1.0
SJMP AGAIN
Delay: SETB TR0
Back: JNB TF0, Back
CLR TR0
CLR TF0
DJNZ R5, Delay
RET
END
In the above program, time period is, T= 2(250*256*1.085µS)
= 138.8mS
Counter programming:
1. In the counter function, the register T0 and T1 are incremented in
response to a 1 to 0 transition at its external inputs T0, T1.In this
function , the external input is sampled during S5P2 of every
machine cycle.
2. When the samples show a high in one cycle and a low in the next
cycle, the count is incremented.
3. The new count value appears in the register during S3P1 of the
cycle following the one in which the transition was detected.
4. Since it takes two machine cycles( 24 oscillator periods) to
recognize a 1 to 0 transition.
5. The maximum count rate is 1/24 of the oscillator frequency. It is to
ensure that given level is sampled at least once before it changes, it
should be held for at least one machine cycle.
P3.4 is used as T0, timer/counter 0 external input.
P3.5 is used as T1, timer/counter 0 external input.
Example
Q. Assuming that clock pulses are fed in to pin T1, write a
program for counter 1 in mode 2 to count the pulses and
display the state of TL1 count on P2.
Solution:
MOV TMOD,#01100000B ;counter 1, mode 2, C/T=1
;external pulses
MOV TH1, #0 ;clear TH1
SETB P3.5 ; make T1 input
AGAIN:SETB TR 1 ; start the counter
BACK: MOV A, TL1 ; get copy of count TL1
MOV P2, A ; display it on port 2
JNB TF1, BACK ; keep doing it if TF=0
CLR TR 1 ;stop the counter 1
CLR TF 1 ;make TF=0
SJMP AGAIN ; keep doing it
 Notice in the above program the role of the instruction
“SETB P3.5”. Since ports are set up for output when 8051
is powered up, we make P3.5 an input port by making it
high. In other words, we must configure (set high) the T1 pin
(Pin3.5) to allow pulses to be fed into it.

T0
TH0 TL0 TF0

P3.4 TF0 goes high when

Th fromFFFF to 0000
Equivalent instructions for the timer control registers
FOR TIMER 0
SETB TR0 = SETB TCON.4
CLR TR0 = CLR TCON.4
SETB TF0 = SETB TCON.5
CLR TF0 = CLR TCON.5
FOR TIMER 1
SETB TR1 = SETB TCON.6
CLR TR1 = CLR TCON.6
SETB TF1 = SETB TCON.7
CLR TF1 = CLR TCON.7
TCON : Timer/Counter Control Register

TF 1 TR1 TF 0 TR 0 IE 1 IT 1 IE 0 IT 1
•The case of gate = 1 in TMOD:

So far, the task of timer is started through software using SETB TR0
and TR1 instruction.

If gate bit in TMOD is set to 1,the start and stop of a the timer are
done externally through pins P3.2 and P3.3 of T0 & T1.

This way of operation has several application.

For example, assume that on 8051 system is used to sound an alarm

every second using T0, in addition to many things. A switch can be
connected to pin 3.2 , which can be used to turn on and off the timer,
there by shutting down the alarm.
 XTAL
oscillator % 12
C/ T=0
O O
C/ T =1
T 0 Pin
Pin 3.4

TR 0

Gate O

INT0 Pin
Pin3.2