UNIT-1

Lecture -2
 Topics
 Registers and Register Files

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

 Registers and Register Files
 A register file is an array of processor registers in a central
processing unit (CPU)
 The Register File is the highest level of the memory
hierarchy.
 Register file can be implemented using SRAM with multiple
ports.
 Such RAMs are distinguished by having dedicated read and
write ports, whereas ordinary SRAMs will usually read and
write through the same ports.
 Two roles
 User-visible registers
 Control and status registers
Dr.J.saira banu , Associate Professor, SCOPE, VIT University
 User-Visible Registers
 General Purpose
 Data
 Address
 Condition Codes

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

 General Purpose Registers
 True general purpose registers – register can contain the
operand for any Opcode
 Restricted – used for specific operations – floating point and
stack operations. (dedicated registers)
 Data registers – used only to hold data and cannot be
employed in the calculation of an operand address –
Accumulator (AC)
 Address registers
 Segment registers – holds the address of the base of the segment.
 Index registers – used for indexed addressing and may be auto-
indexed
 Stack pointer – points to the top of the stack (if there is a user-visible
stack addressing, stack is in memory)
Dr.J.saira banu , Associate Professor, SCOPE, VIT University
 Condition Code Registers – Flags
 Condition codes are bits set by the CPU hardware as the result
of operations.
 Machine instructions allow these bits to be read by implicit
reference.
 Programmer cannot alter them
 In some machines, sub-routine call will result in the automatic
saving of all user-visible registers, to be restored on return.
 Sets of individual bits, flags
 e.g. result of last operation was zero
 Can be read by programs
 e.g. Jump if zero – simplifies branch taking

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

 Control & Status Registers
 Not visible to the user
 May be visible in a control or operating system
mode (supervisory mode)
 Registers essential to instruction execution:
 Program Counter (PC)
 Instruction Register (IR)
 Memory Address Register (MAR) – connects to
address bus
 Memory Buffer Register (MBR) – connects to data bus,
feeds other registers
Dr.J.saira banu , Associate Professor, SCOPE, VIT University
Example Register Organizations

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

 A register file with three access
ports - symbol
Data in C
16
2
Address C Port C

Register File
RF

2 2
Address A Port A Port B Address B

16 16

Data out A Data out B

Dr.J.saira banu , Associate Professor, SCOPE, VIT University

A Register File with three access ports
– logic diagram
16 Data in C Ex: R3 ← R1 + R2
Write 11 2 4-way 16-bit Read Address A = 0
address C S demultiplexer Read Address B = 1
16 Write Address C = 1
16 16 16

16-bit register R3 16-bit register R2

16-bit
0101 register R1 16-bit register R0
16 16 ●
16 ●
● 16
●

2 4-way 16-bit 4-way 16-bit 2

S S
01 multiplexer multiplexer
Read Read
address A 16 16 address B
Data out A
Data out B
Dr.J.saira banu , Associate Professor, SCOPE, VIT University
 A Register File with three access ports
– logic diagram 1011

Data in C
16 Ex: R3 ← R1 + R2
2 Read Address A = 0
Write11 4-way 16-bit
S demultiplexer Read Address B = 1
address C
Write Address C = 1
16 16 16 16

16-bit register R3 16-bit

0110 register R2 16-bit
0101 register R1 16-bit register R0
16 16 ●
16 ●
● 16
●

2 4-way 16-bit 4-way 16-bit 2

S multiplexer S 10
01 multiplexer
Read Read
address A 16 16 address B
Data out A Data out B
Dr.J.saira banu , Associate Professor, SCOPE, VIT University
Questions
• If there are 8 registers in a register file then
• How many bits are needed for read/write address?
• What is the size of the demultiplexer and multiplexer
required?
• How many multiplexers and demultiplexer’s are required to
perform three read and one write operation?
• If 4 multiplexers are used, how many parallel reads
can be performed?
• If 2 demultiplexers are used, how many parallel writes
can be performed?
• Design a register file that stores eight 32 bit numbers
and has one read and one write port. Perform the
following arithmetic operation such R2= R1+1.