Chapter four

Instruction Set Of 8086

 Instruction Set Of 8086
 An instruction is a command to a
microprocessor to perform a specific task on
data.
 The entire group of instructions that a
microprocessor supports is called Instruction
Set.
 Instruction set determines the functionalities the
microprocessor can perform.
 The 8086 microprocessor instructions can be
classified into Six functional categories.
 Instruction set classification
The 8086 microprocessor instructions can be
classified into Six functional categories.
1.Data movement/transfer Instructions
2.Arithmetic Instructions
3.Bit Manipulation Instructions
4.String Manipulation Instructions
5.Processor Control Instructions
6.Program Execution Transfer Instructions
1. Data Transfer/Movement Instructions
 Instructions that are used to transfer data/
address in to registers, memory locations and
I/O ports.
 Generally involve two operands: Source operand
and Destination operand of the same size.
 Source: Register or a memory location or an
immediate data
 Destination: Register or a memory location.
 Possible combination:
 memory, immediate
 REG, immediate
 memory, REG
 REG, REG
 1. Data movement Instructions
(data Transfer ins)
 Both source and destination cannot be memory
location at the same time.
 The size of operand should be either a byte
or a word.
 A 8-bit data can only be moved to 8-bit
register/ memory and a 16-bit data can be
moved to 16-bit register/ memory.
 Data transfer instructions of 8086 includes :
MOV, PUSH, POP, XCHG, IN, OUT, LEA,
LDS, LES, LAHF, SAHF, PUSHF, POPF
 1. Data Transfer Instructions
MOV Copies a word or byte of data from a
PUSH
specified source to a specified destination.
POP The destination can be a register or a
XCHG memory location.
IN The source can be a register or a memory
OUT location or an immediate number.
LEA No flags are affected by this instruction.
LDS The source and destination in an instruction
LES cannot both be memory locations.
LAHF Format: MOV Destination, Source
SAHF
Example:
PUSHF MOV CX, 037AH ; Put the immediate number 037AH in CX
POPF MOV BL, [437AH] ; Copy byte in DS at offset 437AH to BL
MOV AX, BX ; Copy contents of register BX to AX
MOV [589H], BX
 1. Data Transfer Instructions
MOV Used to copy a word in a register or a
PUSH memory location into stack.
POP
If the source is a register, it must bit 16-
XCHG
bit.
During push, the most-significant data byte
IN
moves to the stack segment memory location
OUT
addressed by SP-1 and least-significant
LEA
data byte moves into the stack segment
LDS
memory location addressed by SP-2.
LES SP is decremented by 2 after execution of
LAHF PUSH.
SAHF No flags are affected by this instruction.
PUSHF Format: PUSH Source
POPF Example:
PUSH CX; Decrement SP by 2, PUSH CX content in stack
PUSH AL; Illegal, must push a word
 1. Data Transfer Instructions
MOV

PUSH  There is also a PUSHA (Push All)

POP instruction that copies the contents
XCHG of some of the internal registers to
IN the stack.
OUT  The PUSHA (push all) instruction
LEA
copies the registers to the stack in
LDS
the following order: AX, CX, DX,
LES
LAHF
BX, SP, BP, SI, and DI.
SAHF
PUSHF
POPF
 1. Data Transfer Instructions
MOV
PUSH Copies the top word from the stack to a
destination specified in the instruction.
POP The destination can be a general purpose
XCHG
register, a segment register (except CS)
IN
or a memory location.
OUT
After the word is copied to the specified
LEA destination, the SP is incremented by 2 to
LDS point to the next word in the stack.
LES No flags are affected by this instruction.
LAHF Format: POP Destination
SAHF
PUSHF Example:
POPF POP DX; Copy a word from top of stack to DX , Increment SP by 2
POP AL; Illegal, must POP a word
POP CS; Illegal
 1. Data Transfer Instructions
MOV
Exchanges the contents of a register with
PUSH the contents of another register or a
POP memory location.
XCHG It cannot exchange directly the contents
IN
of two memory locations.
The source and destination must both be
OUT
words or they must both be bytes.
LEA
The segment registers cannot be used in
LDS this instruction.
LES No flags are affected by this instruction.
LAHF Format: XCHG Destination, Source
SAHF
Example:
PUSHF
XCHG AL, BH; Exchange a byte in AL with a byte in BH
POPF XCHG AX, [BX]; Exchanges content of AX with content of
memory at [BX]
 1. Data Transfer Instructions
MOV Copy data from a port to the AL or AX register.
PUSH If an 8-bit port is read, the data will go to AL.
POP If a 16-bit port is read, the data will go to AX.
XCHG Has two possible formats, fixed port and variable
port.
IN For the fixed-port type, the 8-bit address of a
OUT port is specified directly in the instruction.
LEA For the variable-port-type, the port address is
LDS
loaded into the DX register before the IN
instruction. As DX is 16 bit, address can be any
LES
number between 0000H and FFFFH.
LAHF Format: IN Accumulator, Port
SAHF
Example:
PUSHF
IN AL, 80H; Input a byte from the port with address 80H to AL
POPF MOV DX, 0FF78H; Initialize DX to point to port FF78H
IN AL, DX; Input a byte from 8-bit port 0FF78H to AL
IN AX, 1234H ; Illegal port address should bit 8-bit (0-255)
 1. Data Transfer Instructions
MOV Copies a byte from AL or a word from AX to
PUSH the specified port.
POP Has two possible formats, fixed port and
XCHG variable port.
IN For the fixed-port type, the 8-bit address of
a port is specified directly in the instruction.
OUT For the variable-port-type, the contents of AL
LEA or AX will be copied to the port at an address
LDS contained in DX. As DX is 16 bit, address can
LES be any number between 0000H and FFFFH.
LSS Format: OUT Port, Accumulator
LAHF
Example:
SAHF
OUT 2CH, AX; Copy the contents of AX to port 2CH
PUSHF MOV DX, 0FFF8H; Load desired port address in DX
POPF OUT DX, AL; Copy contents of AL to port FFF8H
OUT 1234H, AX ; Illegal
 1. Data Transfer Instructions
MOV
PUSH
POP Determines the offset address of the
XCHG variable or memory location named as the
IN source and puts this offset address in
OUT the indicated 16 bit register.
LEA No flags are affected by this instruction.
LDS Format: LEA Register, Source
LES
LAHF
SAHF Example:
PUSHF LEA CX, [BX][SI]; Load CX with the value equal to (BX)+(SI)
where (BX) and (SI) represents content of BX and SI respectively.
POPF

LEA: load-effective address

 1. Data Transfer Instructions
MOV
PUSH Load register and DS with words from
POP memory.
XCHG The LDS instruction copies a word from the
IN memory location specified in the instruction
OUT into the register and then copies a word from
LEA the next memory location into the DS
register.
LDS No flags are affected by this instruction.
LES Format: LDS Register, Memory Address of First Word
LAHF
Example:
SAHF LDS BX, [SI];
PUSHF
POPF
 1. Data Transfer Instructions
MOV
PUSH Load Register and ES with Words from
POP Memory.
XCHG The LES instruction copies a word from the
IN memory location specified in the instruction
OUT into the register and then copies a word from
LEA
the next memory location into the ES
LDS
register.
No flags are affected by this instruction.
LES Format: LES Register, Memory Address of First Word
LAHF Example:
SAHF LES BX, [SI];
Example:
PUSHF
LEA CX, [BX][SI]; Load CX with the value equal to (BX)+(SI) where
POPF (BX) and (SI) represents content of BX and SI respectively.
 1. Data Transfer Instructions
MOV
PUSH These instructions are flag transfer
POP instructions.
XCHG LAHF: copies the low byte of flag register into
IN AH.
OUT SAHF: Store content of AH in the low byte of
flag register.
LEA
PUSHF: pushes the flag register onto the
LDS
stack.
LES
POPF: copies a word from the two memory
LAHF locations at the top of the stack to the flag
SAHF register and increments the stack pointer by 2.
PUSHF SAHF and POPF instructions may affect flag
register.
POPF
Format: No operands.
 2. Arithmetic Instructions
ADD Addition
ADC ADD reg2/mem, reg1/mem

INC ADD reg2, reg1 (reg2)  (reg1) + (reg2)

SUB ADD reg2, mem (reg2)  (reg2) + (mem)
ADD mem, reg1 (mem)  (mem) + (reg1)
SBB ADD reg/mem, data
DEC
ADD reg, data (reg)  (reg) + data
NEG ADD mem, data (mem)  (mem) + data
MUL Flags affected : AF, CF, OF, PF, SF, ZF
DIV Example:
CMP ADD AL, 74H
ADD DX, AX
 2. Arithmetic Instructions
ADD Addition with Carry
ADC reg2/ mem, reg1/mem
ADC
INC ADC reg2, reg1 (reg2)  (reg1) + (reg2)+CF
ADC reg2, mem (reg2)  (reg2) + (mem)+CF
SUB ADC mem, reg1 (mem)  (mem)+(reg1)+CF
SBB
DEC ADC reg/mem, data

NEG ADC reg, data (reg)  (reg)+ data+CF

MUL ADC mem,
Flags data :
affected AF, CF, OF, PF, 
(mem) SF, ZF
(mem)+data+CF

DIV Example:
CMP ADC AL, 74H
ADC DX, AX
 2. Arithmetic Instructions
ADD
ADC Increment

INC INC reg/ mem

SUB INC reg8 (reg8)  (reg8) + 1

SBB INC reg16 (reg16)  (reg16) + 1
DEC INC mem (mem)  (mem) + 1
Flags affected : AF, OF, PF, SF, ZF
NEG
CF is not effected.
MUL
DIV Example:
CMP INC AX ; Add 1 to the content of AX
 2. Arithmetic Instructions
ADD Subtraction

ADC SUB reg2/ mem, reg1/mem

INC SUB reg2, reg1 (reg2)  (reg1) - (reg2)

SUB reg2, mem (reg2)  (reg2) - (mem)
SUB SUB mem, reg1 (mem)  (mem) - (reg1)
SBB SUB reg/mem, data
DEC
SUB reg, data (reg)  (reg) - data
NEG SUB mem, data (mem)  (mem) - data
MUL Flags affected : AF, CF, OF, PF, SF, ZF
DIV Example:
CMP SUB AL, 74H
SUB DX, AX
 2. Arithmetic Instructions
Subtraction with Borrow/Carry
ADD
SBB reg2/ mem, reg1/mem
ADC
INC SBB reg2, reg1 (reg2)  (reg1) - (reg2) -CF
SBB reg2, mem (reg2)  (reg2) - (mem)- CF
SUB SBB mem, reg1 (mem)  (mem) - (reg1) –CF
SBB SBB reg/mem, data

DEC
SBB reg, data (reg)  (reg) – data - CF
NEG SBB mem, data (mem)  (mem) - data - CF

MUL Flags affected : AF, CF, OF, PF, SF, ZF

DIV Example:
CMP SBB AL, 74H
SBB DX, AX
 2. Arithmetic Instructions
ADD
ADC
Decrement
INC
INC reg/ mem
SUB
SBB DEC reg8 (reg8)  (reg8) - 1
DEC reg16 (reg16)  (reg16) - 1
DEC DEC mem (mem)  (mem) - 1
NEG Flags affected : AF, OF, PF, SF, ZF
MUL CF is not effected.
DIV
CMP Example:
DEC AX ; Subtract 1 from the content of AX
 2. Arithmetic Instructions
ADD Negate:
ADC It creates 2’s complement (1’s complement plus
INC one) of a given number.
SUB That means, it changes the sign of a number.
SBB NEG reg/ mem

DEC NEG reg8 (reg8) 2’s complement (reg8)

NEG NEG reg16 (reg16) 2’s complement (reg16)
NEG mem (mem) 2’s complement (mem)
MUL Flags affected : AF, CF, OF, PF, SF, ZF
DIV
Example:
CMP MOV AL, 62H ; AL= 62H 0r AL=98
NEG AL ; AL=9EH or AL=-98
 2. Arithmetic Instructions
ADD Multiplication :
 This instruction assumes one of the operand
ADC
is in AL or AX.
INC
 When a byte is multiplied by the contents of
SUB
AL, the result (product) is put in AX.
SBB  When a word is multiplied by the contents of
DEC AX, the most significant word of the result
NEG is put in the DX register, and the least
MUL significant word of the result is put in the
AX register.
DIV
CMP
 2. Arithmetic Instructions
MUL reg/ mem
ADD
ADC MUL reg For byte : (AX)  (AL) x (reg8)
For word : (DX)(AX)  (AX) x (reg16)
INC
MUL mem For byte : (AX)  (AL) x (mem8)
SUB For word : (DX)(AX)  (AX) x (mem16)
SBB IMUL reg/ mem

DEC IMUL reg For byte : (AX)  (AL) x (reg8)

NEG For word : (DX)(AX)  (AX) x (reg16)
IMUL mem
MUL Flags
For byte : (AX)  (AX) x (mem8)
affectedFor
: CF
wordand OF
: (DX)(AX)  (AX) x (mem16)
DIV AF, PF, SF and ZF flags are undefined
Example:
CMP
MUL BL ;AL * BL, Result in AX
MUL BX ;AX * BX, Result high word in DX and low word in AX
IMUL: signed integer
 2. Arithmetic Instructions
Division:
ADD Division by byte:
ADC  This instruction assumes the dividend is in
INC AX for dividing word by 8-bit register or
memory location.
SUB
 The quotient moves into AL after the
SBB
division with AH containing the remainder.
DEC Division by Word:
NEG  The dividend is in (DX)(AX) for dividing
MUL double word by 16-bit register or memory
DIV location
 The quotient appears in AX and the
CMP
remainder appears in DX after a 16-bit
All flags would not be affected by this instruction.
division.
 2. Arithmetic Instructions
DIV reg/ mem

DIV reg
ADD For 16-bit ÷ 8-bit :
(AL)  (AX) ÷ (reg8) Quotient
ADC (AH)  (AX) MOD(reg8) Remainder
INC For 32-bit ÷ 16-bit :
SUB (AX)  (DX)(AX) ÷ (reg16) Quotient
(DX)  (DX)(AX) MOD(reg16) Remainder
SBB
DEC DIV mem
For 16-bit ÷ 8-bit :
(AL)  (AX) ÷ (mem8) Quotient
NEG (AH)  (AX) MOD(mem8) Remainder

MUL For 32-bit ÷ 16-bit :

Example: (AX)  (DX)(AX) ÷ (mem16) Quotient
DIV
DIV BL ;AX ÷ BL, word(DX) (DX)(AX)
 divided
in AX MOD(mem16)
by byte in BL Remainder
CMP ; Result: Quotient in AL, Reminder in AH
DIV BX ;Double word in (DX)(AX) divided by a word in BX
; Result: Quotient in AX, Reminder in DX
 2. Arithmetic Instructions
Comparison:
ADD  The comparison is done simply by internally subtracting
the source from destination.
ADC
 The value of source and destination does not change, but
INC the flags are modified to indicate the result.
SUB CMP reg2/mem, reg1/ mem CMP Operand2, Operand1

SBB CMP reg2, reg1

Modify flags  (Operand2) – (Operand1)
DEC CMP reg2, mem
If (Operand2) > (Operand1) then CF=0, ZF=0, SF=0
NEG CMP mem, reg1
If (Operand2) < (Operand1) then CF=1, ZF=0, SF=1
If (Operand2) = (Operand1) then CF=0, ZF=1, SF=0
MUL CMP reg, data

DIV CMP mem, data

Example:
CMP CMP AL, 01H ;Compare immediate number01H with byte In AL
CMP BH, CL ;Compare byte in CL with byte in BH
 3. Bit Manipulation Instructions
 The bit manipulation instructions are used at
the bit level.
 These group of instructions include:
3.1. Logical instructions
3.2. Shift instructions
3.3. Rotate instructions
 3.1. Logical instructions
NOT NOT: Invert Each Bit of Operand.
AND NOT reg/ mem

OR
NOT reg8 (reg8)  (reg8)’
XOR
NOT reg16 (reg16)  (reg16)’
TEST
NOT mem (mem)  (mem)’
No flags are affected by the NOT
Instruction.
Example:
NOT BX ;Complement contents of BX register
 3.1. Logical instructions
AND
NOT
AND reg2/mem, reg1/mem
AND
AND reg2, reg1 (reg2)  (reg1) & (reg2)
OR AND reg2, mem (reg2)  (reg2) & (mem)
AND mem, reg1 (mem)  (mem) & (reg1)
XOR
AND reg/mem, data
TEST
AND reg, data (reg)  (reg) & data
AND mem, data (mem)  (mem) & data
CF and OF are both 0 after AND. PF, SF, and
ZF are updated by AND. AF is undefined.
Example:
AND BH, CL ;AND byte in CL with byte in BH. Result in BH
AND BX, 00FFH ; AND word in BX with immediate value 00FFH.
 3.1. Logical instructions
OR
NOT
OR reg2/mem, reg1/mem
AND
OR reg2, reg1 (reg2)  (reg1) | (reg2)
OR OR reg2, mem (reg2)  (reg2) | (mem)
OR mem, reg1 (mem)  (mem) | (reg1)
XOR
OR reg/mem, data
TEST
OR reg, data (reg)  (reg) | data
OR mem, data (mem)  (mem) | data
CF and OF are both 0 after OR. PF, SF, and ZF
are updated by OR. AF is undefined.
Example:
OR BH, CL ;CL ORed with BH. Result in BH
OR BX, 00FFH ; BX ORed with immediate value 00FFH.
 3.1. Logical instructions
Exclusive OR
NOT
XOR reg2/mem, reg1/mem
AND
XOR reg2, reg1 (reg2)  (reg1) ^ (reg2)
OR XOR reg2, mem (reg2)  (reg2) ^ (mem)
XOR mem, reg1 (mem)  (mem) ^ (reg1)
XOR XOR reg/mem, data
TEST
XOR reg, data (reg)  (reg) ^ data
XOR mem, data (mem)  (mem) ^ data
CF and OF are both 0 after XOR. PF, SF, and
ZF are updated by XOR. AF is undefined.
Example:
XOR BH, CL ;CL XORed with BH. Result in BH
XOR BX, 00FFH ; BX XORed with immediate 00FFH.
 3.1. Logical instructions
 ANDs the contents of a source byte or word
NOT with the contents of the specified destination
word.
AND  Flags are updated, but neither operand is
OR changed.
XOR  The TEST instruction is often used to set flags
before a Conditional Jump instruction.
TEST TEST reg2/mem, reg1/ mem TEST Operand2, Operand1

TEST reg2, reg1 Modify flags  (Operand2) & (Operand1)

TEST reg2, mem

TEST mem, reg1

TEST reg, data

TEST mem, data

 3.1. Logical instructions
NOT  CF and OF are both 0 after TEST.
AND  PF, SF, and ZF are updated by AND.
 AF is undefined.
OR
XOR
TEST Example:
TEST AL, BH ; AND BH with AL, no result stored. Update
PF, SF, ZF
TEST CX, 0001H ; AND CX with immediate number
0001H, no result stored. Update PF, SF, ZF
 3.2. Shift instructions
 Shift instructions position or move binary
data to the left or right by shifting them
with the register or memory location.
 Shift instructions can be:
 Logical shift: SHL and SHR
Put a 0 in LSD for SHL and put a 0 in MSD for
SHR.
 Arithmetic shift: SAL and SAR
SAR copies the sign bit.
SAL is the same as SHL
 3.2. Shift instructions
 It shift bits of byte or word left, by count.
SHL  It puts zero(s) in LSBs. MSB is shifted into
carry flag.
SAL
 If the number of bits desired to be shifted is
SHR 1, then the immediate number 1 can be
SAR written in Count.
 However, if the number of bits to be shifted
is more than 1, then the count is put in CL
register.
 SHL can be used to multiply a binary number by a
power of 2.
 SHL reg2/mem, data/ CL
 SHL AX, 1 ; Multiplies AX by 2
 SHL AX, CL ; Multiples AX by 2CL
 3.2. Shift instructions
 CF, PF, SF, and ZF are updated.
 AF is undefined.
SHL
 Examples:
SAL multiply content of AX by 4 using SHL
SHR MOV CL, 2
SHL AX, CL
SAR
 3.2. Shift instructions
SHL
SAL
Similar to SHL.
SHR
SAR
 3.2. Shift instructions
 It shift bits of byte or word right, by count.
SHL  It puts zero(s) in MSBs. LSB is shifted into
SAL carry flag.
 CF, PF, SF, and ZF are updated.
SHR  AF is undefined.
SAR  SHR can be used to divide a binary number by a
power of 2.
 SHR reg2/mem, data/ CL
 SHR AX, 1 ; Divide AX by 2,
 SHR AX, CL ; Divide AX by 2CL
 3.2. Shift instructions
 Preforms Right Arithmetic Shift on the
SHL destination operand.
SAL  As a bit is shifted out of the MSB position, a
copy of the old MSB is put in the MSB
SHR
position. i.e the sign bit is copied into the
SAR MSB.
 The LSB will be shifted into CF.
 CF, PF, SF, and ZF are updated.
 AF is undefined.
 SAR reg2/mem, data/ CL
Example:
MOV DL, -60 ; DL=-60
MOV CL, 2
SAR DL, CL ; DL=-15
 3.3. Rotate instructions
 It rotates bits of byte or word left, by count.
ROL  MSB is transferred to LSB and also to CF.
 If the number of bits desired to be shifted is
ROR
1, then the immediate number 1 can be
RCL written in Count.
RCR  However, if the number of bits to be shifted
is more than 1, then the count is put in CL
register.
 ROL reg2/mem, data/ CL
Example:
ROL AX, 1 ;Word in AX rotate 1 bit position left, MSB to LSB and CF
MOV CL, 04H ;Load number of bits to rotate in CL
ROL BL, CL ; Rotate BL 4 bit positions (swap nibbles)
 3.3. Rotate instructions
 It rotates bits of byte or word right, by
ROL count.
 LSB is transferred to MSB and also to CF.
ROR
 ROR reg2/mem, data/ CL
RCL Example:
RCR MOV BL, 00111011b
MOV CL, 02H ;Load number of bits to rotate in CL
ROR BL, CL ; BL=11001110
 3.3. Rotate instructions
 Rotate operand around to the Left through
ROL carry.
ROR  CF is transferred to LSB.
 MSB is transferred to CF.
RCL  RCL reg2/mem, data/ CL
RCR Example:
 3.3. Rotate instructions
 Rotate operand around to the right through
ROL carry.
ROR  CF is transferred to MSB.
 LSB is transferred to CF.
RCL  RCL reg2/mem, data/ CL
RCR Example:
 4. String Manipulation Instructions
 String: Sequence of bytes or words.
 8086 instruction set includes instruction for
string movement, comparison, scan, load and
store.
 REP instruction prefix: used to repeat
execution of string instructions
 String instructions end with S or SB or SW.
 S represents string, SB string byte and SW string
word.
 Offset or effective address of the source operand is
stored in SI register and that of the destination
operand is stored in DI register.
4. String Manipulation Instructions
 SI and DI are offsets in to DS and ES
respectively.
 Depending on the status of DF, SI and DI
registers are automatically updated.
 DF = 0  SI and DI are incremented by 1 for
byte and 2 for word.
 DF = 1  SI and DI are decremented by 1 for
byte and 2 for word.
4. String Manipulation Instructions
 8086 has the following string manipulation
instructions:
 MOVS: Move Sting Byte or String Word
 CMPS: Compare String Byte or String Word
 SCAS: Scan String Byte or String Word
 LODS: Load String Byte or String Word
 STOS: Store String Byte or String Word
 REP: Repeat Instruction Prefix
 4. String Manipulation Instructions
MOVS Move Sting Byte or String Word
Moves a string of bytes/words pointed by DS:SI
in the memory to location pointed by ES:DI.
CMPS
No flags are affected by this instruction.
Format:
SCAS If X=(DS) x 10h + (SI) and Y=(ES) x 10h + (DI)
MOVSB ; (Y)  (X),
LODS ; If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1
; If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) - 1
STOS MOVSW ; (Y; Y+1 )  (X; X+1),
; If DF = 0, then (DI)  (DI) + 2; (SI)  (SI) + 2
; If DF = 1, then (DI)  (DI) - 2; (SI)  (SI) - 2
REP
 4. String Manipulation Instructions
Compare String Byte or String Word
MOVS The comparison is done by subtracting the byte or
word pointed by ES:DI from the byte or word
CMPS pointed by DS:SI.
Both operands are not affected.
Format: CMPSB, CMPSW
SCAS
If X=(DS) x 10h + (SI) and Y=(ES) x 10h + (DI)
Modify flags (X)-(Y)
LODS
If (X) > (Y), then CF = 0; ZF = 0; SF = 0
If (X)< (Y) , then CF = 1; ZF = 0; SF = 1

STOS If (X) = (Y) , then CF = 0; ZF = 1; SF = 0

For CMPSB:
If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1
REP If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) – 1

For CMPSW:
If DF = 0, then (DI)  (DI) + 2; (SI)  (SI) + 2
If DF = 1, then (DI)  (DI) - 2; (SI)  (SI) - 2
 4. String Manipulation Instructions
Scan (compare) a string byte or word with
MOVS accumulator
SCAS compares a byte in AL or a word in AX
CMPS with a byte or word pointed by DI in ES.
The string to be scanned must be in the
SCAS extra segment.
Both operands are not affected.
LODS Format: SCASB, SCASW
For SCASB:
STOS If Y=(ES) x 10h + (DI)
Modify flags (AL)-(Y)
If (AL) > (Y), then CF = 0; ZF = 0; SF = 0
REP If (AL)< (Y) , then CF = 1; ZF = 0; SF = 1
If (AL) = (Y) , then CF = 0; ZF = 1; SF = 0

If DF = 0, then (DI)  (DI) + 1

If DF = 1, then (DI)  (DI) - 1
 4. String Manipulation Instructions
MOVS For SCASW:
If Y=(ES) x 10h + (DI)
CMPS Modify flags (AX)-(Y)
If (AX ) > (Y), then CF = 0; ZF = 0; SF = 0
If (AX)< (Y) , then CF = 1; ZF = 0; SF = 1
SCAS If (AX) = (Y) , then CF = 0; ZF = 1; SF = 0

LODS If DF = 0, then (DI)  (DI) + 2

If DF = 1, then (DI)  (DI) - 2

STOS

REP
 4. String Manipulation Instructions
Load string byte in to AL or string word in to AX.
MOVS Copies a byte from a string location pointed by SI
to AL, or a word from a string location pointed by
CMPS SI to AX.
Doesn’t affect any flag.
SCAS Format: LODSB, LODSW
If X=(DS) x 10h + (SI)
LODS LODSB ; (AL)(X)
; If DF = 0, then (SI)  (SI) + 1
: If DF = 1, then (SI)  (SI) – 1
STOS
LODSW ; (AX)(X)
REP ; If DF = 0, then (SI)  (SI) +2
; If DF = 1, then (SI)  (SI) – 2
 4. String Manipulation Instructions
MOVS Store byte from AL or word from AX in to string.
Copies a byte from AL or a word from AX to a
memory location in the extra segment pointed to
CMPS
by DI.
Doesn’t affect any flag.
SCAS Format: STOSB, STOSW
If Y=(ES) x 10h + (DI)
LODS
STOSB ; (Y)(AL)
; If DF = 0, then (DI)  (DI) + 1
STOS ; If DF = 1, then (DI)  (DI) - 1
STOSW ; (Y)(AX)
DF = 0, then (DI)  (DI) + 2
REP ; If
; If DF = 1, then (DI)  (DI) - 2
 4. String Manipulation Instructions
MOVS It is a Prefix that repeats String Instruction
until specified conditions exist.
REP is a prefix, which is written before one of
CMPS
the string instructions. It will cause the CX
register to be decremented and the string
SCAS instruction to be repeated until CX = 0.

LODS REP: repeat execution of string instruction until CX=0

STOS Example: REP MOVSB

REP

55
 4. String Manipulation Instructions
MOVS REPZ / REPE: While CX  0 and ZF = 1, repeat
execution of string instruction and (CX)  (CX) – 1
CMPS Example:
REPZ CMPSB ; Compare string bytes until end of string or
SCAS until string bytes not equal.

REPNZ / REPNE: While CX  0 and ZF = 0,

LODS
repeat execution of string instruction and
(CX)  (CX) – 1
STOS
Example:
REPNE SCASW; Scan a string of words until a
REP word in the string matches the
word in AX or until all of the
string has been scanned.
56
 5) Processor Control Instructions
 These instructions control the functioning of
the available hardware inside the processor
chip.
 These instructions are categorized into two
types:
1) Flag Manipulation instructions
2) Machine Control and External Hardware
Synchronization Instructions
 5) Processor Control Instructions
5.1) Flag Control Instructions
Mnemonics Explanation
STC Set CF  1
CLC Clear CF  0
CMC CF  Complement (CF)
STD Set direction flag DF  1
CLD Clear direction flag DF  0
STI Set interrupt enable flag IF  1
CLI Clear interrupt enable flag IF  0
 5) Processor Control Instructions
5.2) Machine Control and External Hardware Synchronization
Instructions

Mnemonics Explanation
HLT Halt the process.
WAIT Wait for TEST pin active
ESC opcode mem/ reg Used to pass instruction to a
coprocessor which shares the
address and data bus with the 8086
LOCK Lock bus during next instruction
NOP No operation
 6) Program Execution Transfer Instructions
 The program control/ execution transfer/
instructions transfer the flow of execution of
the program to a new address specified in the
instructions directly or indirectly.
 When this type of instruction is executed,
the CS and IP registers get loaded with new
values of CS and IP corresponding to the
location to be transferred.
 This type of instructions is classified in to
two types:
 Unconditional program control instructions
 Conditional program control instructions
6.1 Unconditional program control instructions
 In the case of unconditional program control
instructions, the execution control is transferred to
the specified location independent of any status or
condition.
 Instructions in this category include: CALL,
RET, JMP.
 CALL: Unconditional Call
 This instruction is used to call a Subroutine
(Procedure) from a main program. Address of
procedure may be specified directly or
indirectly.
 There are two types of procedure depending
upon whether it is available in the same
segment or in another segment.
 Near procedure: Procedure is stored in the same
code segment with the main program.
 Far procedure: Procedure is stored outside of the
main program’s code segment.
 CALL: Unconditional Call
 For Near procedures:
 CALL instruction pushes content of IP register in
to the Stack and loads IP register with offset
addresses of the procedure to be called.
 For Far procedures:
 CALL instruction pushes content of both IP and CS
registers in to the Stack and loads CS & IP
registers with segment and offset addresses of
the procedure to be called.
 RET: Return from the Procedure
 At the end of the procedure, the RET
instruction must be executed.
 The RET instruction will return execution
from a procedure to the next instruction
after the CALL instruction which was used to
CALL the procedure.
 If the procedure is a near procedure:
 then the return will be done by replacing the
instruction pointer with a word from the top of
the stack.
 RET: Return from the Procedure
 If the procedure is a far procedure:
 then the instruction pointer will be replaced by the
word at the top of the stack.
 The stack pointer will then be incremented by 2.
 The code segment register is then replaced with a
word from the new top of the stack.
 JMP: - Unconditional Jump
 This instruction will always cause the 8086 to
fetch its next Instruction from the location
specified in the instruction rather than from
the next location after the JMP instruction.
Example:
JMP NEXT ; Fetch next instruction from address at label NEXT. This is
direct jump
JMP BX ; Replace the contents of IP with the contents of BX. This is
indirect near Jump
JMP [BX] ; Replace IP with a word from a memory location pointed to
by BX in DS. This is an indirect near jump.
JMP DWORD PTR [ SI] ; Replace IP with a word pointed to by SI in DS.
Replace CS with a word pointed to by SI + 2 in
DS. This is an indirect far jump.
 6.1) Conditional program control instructions

 When this instruction is executed, execution

control is transferred to the address
specified relatively in the instruction,
provided the condition implicit if the Opcode
in satisfied. Otherwise execution continues
sequentially.
 Conditional jumps and iteration control
instructions are the most common examples of
this category.
 6.1) Conditional program control instructions
Conditional Jumps
 6.1) Conditional program control instructions

 When signed numbers are compared, use the

JG, JL, JGE, JLE, JE, and JNE instructions.
 The terms greater than and less than refer to
signed numbers.
 When unsigned numbers are compared, use
the JA, JB, JAB, JBE, JE, and JNE
instructions.
 The terms above and below refer to unsigned
numbers.
 6.1) Conditional program control instructions
 LOOP:
 This instruction executes the part of the program
from the Label or address specified in the
instruction up to the LOOP instruction CX number
of times.
 At each iteration, CX is decremented
automatically.
 Example
MOV CX, 0005
MOV BX, 0FF7H
Label: MOV AX, 1234h
OR BX, AX
AND DX, AX
Loop Label
 6.1) Conditional program control instructions
Iteration Control Instructions

Instruction Description
LOOP jump to Specified Label if CX≠0 after Auto
decrement
LOOPE/LOOPZ Loop While CX ≠ 0 and ZF = 1
LOOPNE/LOOPNZ Loop While CX ≠ 0 and ZF = 0
 Example
MOV CX, 0005
MOV BX, 0FF7H
Label: MOV AX, 1234h
OR BX, AX
AND DX, AX
Loop Label
 End of slide
 Example of unconditional jump
ORG 100h
MOV AX, 5 ; set AX to 5.
MOV BX, 2 ; set BX to 2.
JMP calc ; go to 'calc'.
back: JMP stop ; go to 'stop'.
calc:
ADD AX, BX ; add BX to AX.
JMP back ; go 'back'.
stop:
RET ; return to operating system.
END ; directive to stop the compiler.
 Example of conditional jump
include emu8086.inc
ORG 100h
MOV AL, 25 ; set AL to 25.
MOV BL, 10 ; set BL to 10. later change to 25 and try
CMP AL, BL ; compare AL - BL.
JE equal ; jump if AL = BL (ZF = 1).
PUTC 'N' ; if it gets here, then AL <> BL,
JMP stop ; so print 'N', and jump to stop.
equal: ; if gets here,
PUTC 'Y' ; then AL = BL, so print 'Y'.
stop:
RET ; gets here no matter what.
END