DOC 325

Digital Circuits & Logic Design

Module Introduction
 Module Team

Ms. Aathika Salam

aathika.s@iit.ac.lk
077 5317858

Ms. Chathuri Udagedara

Chathuri.u@iit.ac.lk
074 0498766

7/29/20XX Employee orientation 2

Module Outline
WEEK 1  Lecture 1 – Number Systems
Week 2  Lecture 2 – Computer Arithmetic
WEEK 3  Lecture 3 – Logic Gates & Truth table
WEEK 4  Lecture 4 – Boolean Algebra
WEEK 5  Lecture 5 – Boolean Functions / ICT
WEEK 6  Lecture 6 – K-Maps Part1
WEEK 7  Lecture 7 – K-Maps Part2
WEEK 8  Lecture 8 – Combinational Logic Circuits
WEEK 9  Lecture 9 – Adders
Week 10  Viva

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 In-Class Test – 25%

Assessment Assignment – 30%

Criteria
Final Exam – 40%

Attendance – 5%

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 References

 DIGITAL LOGIC DESIGN, FOURTH E BRIAN

HOLDSWORTH & CLIVE WOODS 253

DIGITAL SYSTEMS PRINCIPLES AND APPLICATIONS

(8TH EDITION) – RONALD J. TOCCI & NEAL S. WIDMER

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 Module Delivery
Lecture – 2 hours (Physical)
Tutorial – 2 Hours (Physical)

No Lecture Recordings

Primary Communication Medium

https://learning.iit.ac.lk/course/view.php?id=153

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 Ground Rules

 You cannot change the group or attend another group without

approval from the Level Coordinator.

 Students should be seated five minutes before the

lecture/tutorial is started.

 Students who interrupting the lecturer or other students during

the lecture/tutorial will be sent out of the classroom.
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Thank you