Comp 321 Lecture Slide Chapter 3 (Register Transfer & Microoperations)

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Chapter 3

REGISTER TRANSFER & MICROOPERATIONS

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Computer Registers
▪ How to define the internal hardware organization of a digital
computer ?
1. Set of registers & their function
2. Sequence of microoperations
3. Control that initiates the sequence of microoperation
• Registers hold data that can be readily accessed by the CPU.
• Most computers have registers of a certain size. (Common sizes
include 16, 32, and 64 bits).
• Computer instructions are stored in consecutive memory
locations and executed sequentially one at a time.
• The control reads an instruction from specific address in memory
and executes it. This needs:
1. Counter to calculate the address of the next instruction
2. Register in the control unit for storing instruction codes that
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read from memory.
Cont….

• Simple model computer, the Machine Architecture that is


Really Intuitive and Easy, MARIE, was designed for the
singular purpose of illustrating basic computer system
concepts.
• While this system is too simple to do anything useful in
the real world, a deep understanding of its functions will
enable you to comprehend system architectures that are
much more complex.

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Cont….

The MARIE architecture has the following


characteristics:
• Binary, two's complement data representation.
• Stored program, fixed word length data and instructions.
• 4K words of word-addressable main memory.
• 16-bit data words.
• 16-bit instructions, 4 for the opcode and 12 for the address.
• A 16-bit arithmetic logic unit (ALU).
• Seven registers for control and data movement.

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Cont….

MARIE’s seven registers are:


• Accumulator, AC, a 16-bit register that holds a conditional
operator (e.g., "less than") or one operand of a two-operand
instruction.
• Memory address register, MAR, a 12-bit register that holds
the memory address of an instruction or the operand of an
instruction.
• Memory buffer register, MBR, a 16-bit register that holds
the data after its retrieval from, or before its placement in
memory.
• MBR - holds either the data just read from memory or the
data ready to be written to memory. 5
Cont….

MARIE’s seven registers are:


• Program counter, PC, a 12-bit register that holds the address
of the next program instruction to be executed.
• Instruction register, IR, part of a CPU's Control unit that
holds the instruction currently being executed or decoded.
(16 bit register)
• Input register, InREG, an 8-bit register that holds data read
from an input device.
• Output register, OutREG, an 8-bit register, that holds data
that is ready for the output device.

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Cont….

This is the MARIE architecture shown graphically.

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Register Transfer Language

Register Transfer: Information transfer from one register to


another.
Way of register representation

Symbols for register transfer:


Letters & numerals, ( ), <---, “,” , [ ] ; specify an address for memory
e.g DR <-- M[AR]

•The information transfer from one register to another represented by


symbolic form by means of replacement operator.
e.g. 8
Cont….

• we use the notation M[X] to indicate the actual data value


stored in memory location X.
• Each of our instructions actually consists of a sequence of
smaller instructions(mini instructions) called microoperations.
(e,g shift, Load, clear)
• The symbolic notation used to describe the behavior of
microoperations (the microoperations transfer among registers)
is called register transfer notation (RTN) or register transfer
language (RTL).OR it specifies the exact sequence of
microoperations that are carried out by an instruction.
▪ The use of symbols instead of a narrative explanation provides an
organized and concise manner.
• A convenient tool for describing the internal organization of digital9
computers in concise and precise manner.
Cont….
• Control functions
▪ Control functions: is a Boolean variable that is equal to 1 or
0 which control the enable inputs of registers.
▪ The control condition is terminated with a colon(:).
▪ It symbolizes the requirement that the transfer operation be
executed by the hardware only if P=1.
P : R2 <-- R1
• control function -expressed by timing signal & other binary
conditions.
• This can be shown by means of an if- then statement.
if (P=1) then R2 <--R1

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Cont….

• The RTL for the LOAD instruction is:


MAR ← X
MBR ← M[MAR]
AC ← MBR

• Similarly, the RTL for the ADD instruction is:


MAR ← X
MBR ← M[MAR]
AC ← AC + MBR

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Cont….

• So far, all of the MARIE instructions that we have discussed


use a direct addressing mode.
• This means that the address of the operand is explicitly stated
in the instruction.
• It is often useful to employ indirect addressing, where the
address of the operand is given in the instruction.
▪ If you have ever used pointers in a program, you are
already familiar with indirect addressing.

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Cont….

• To help you see what happens at the machine level, we


have included an indirect addressing mode instruction to
the MARIE instruction set.
• The ADDI instruction specifies the address of the
operand. The following RTL tells us what is happening at
the register level:
MAR ← X
MBR ← M[MAR]
MAR ← MBR
MBR ← M[MAR]
AC ← AC + MBR
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Cont….

• Instead of using the value found at location X as the actual


address, we use the value found in X as a pointer to a new
memory location that contains the data we wish to use in
the instruction.
• For example, if we have the instruction AddI 400, we
would go to location 400, and assuming we found the
value 240 stored at location 400, we would go to location
240 to get the actual operand for the instruction.
• CLEAR instruction set the contents of the accumulator to
all zeroes.
• This is the RTL for CLEAR:
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AC ← 0
Bus and Memory Transfers

• The CPU shares data with other system components by


way of a data bus.
▪ A bus is a set of wires that simultaneously convey a single
bit along each line.
• Two types of buses are commonly found in computer
systems: point-to-point, and multipoint buses.

This is a point-to-point
bus configuration:

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Cont….

A multipoint bus is shown below.


•Because a multipoint bus is a shared resource, access to it
is controlled through protocols, which are built into the
hardware.

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Cont….

Buses consist of data lines, control lines, and address lines.


•While the data lines convey bits from one device to another
(are bidirectional allowing the transfer of data in either
direction),
•control lines determine the direction of data flow, and when
each device can access the bus and for what purpose (reading or
writing from memory or from an I/O device, for example).
•Address lines determine the location of the source or
destination of the data (are unidirectional from processor to
memory)
•*The power lines provide the electrical power necessary

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The next slide shows a model bus configuration.
Cont….

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Common Bus System

• The registers are interconnected, and connected with main


memory through a common data bus.
• Paths must be provided to transfer information from one
register to another and between memory and registers
• A more efficient scheme for transferring information in a
system with many registers is to use a common bus.
• The outputs of seven registers and memory are connected to
the common bus.
• Each device on the bus is identified by a unique number that is
set on the control lines whenever that device is required to
carry out an operation.

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Cont….

• Separate connections are also provided between the


accumulator and the memory buffer register, and the ALU and
the accumulator and memory buffer register.
• This permits data transfer between these devices without
use of the main data bus.
• The lines from the common bus are connected to the inputs of
each register and the data inputs of the memory.
• When LD(Load Input) is enable, the particular register receives
the data from the bus.
• The memory receives data from bus when its write input is
activated.
• The memory places its output to the bus when the read input is
activated.
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Cont….

This is the MARIE data


path shown graphically.

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Cont….

• Every computer contains at least one clock that synchronizes


the activities of its components.
• A fixed number of clock cycles are required to carry out each
data movement or computational operation.
• The clock frequency, measured in megahertz or gigahertz,
determines the speed with which all operations are carried out.
• Clock cycle time is the reciprocal of clock frequency.
• 1MHz is equal to 1 million cycles per second (so 1 hertz is 1
cycle per second).
▪ An 800 MHz clock has a cycle time of 1.25 ns.

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Construction of common bus

One way of constructing a common bus system is with


multiplexers.
What is multiplexer?
- The multiplexers select the source register whose binary
information is place on the bus.
E.g. Construct a bus system for 4 registers, each register is 4bit.

N.B To construct a bus with multiplexer we need n number of


multiplexer, here n=the number of bits in the register.

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Cont….
• 4 bit register X 4
• Four by 4 X 1 Multiplexers 4-line
common
• Bus Selection : S0, S1 bus

When we represent in
Function table by the
value Of S1S0

Q: how many multiplexers are needed for the 16 bit eight registers ?
▪ Number of variables used?🡺selection inputs
▪ How many line common bus is constructed?
▪ Size of multiplexers? 24
Cont….

❖ Number of bits in register determine no of multiplexers


& no of registers determine selection variables & size of
multiplexers
• Bus Transfer
– The content of register A is placed on the bus, and the
content of the bus is loaded into register R1 by
activating its load control input

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Cont….

• Three(tri)-state bus buffer


▪ A bus system can be constructed with three state gates
instead of multiplexers.
▪ Three-state gate- is a digital circuit that exhibits three
states.
• logic 0
• logic 1
• High-impedance state: behaves like an open circuit,
which means that the output is disconnected and
does not have a logic significance.

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Cont….

Design of bus system with buffer gate


• What is buffer gate?
• Deference b/n normal buffer and three-state-buffer?

• Fig, three-state buffer gate


How can we construct a bus?

Fig. Bus system with three-state bus buffer 27


Cont….

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Memory Transfer

• The transfer of information from a memory word to the


outside environment is called a read operation.
• The transfer of new information to be stored into the
memory is called a write operation.
• A memory word will be symbolized by the letter M.
Q1. Transfer of information into DR from the memory word M
selected by the address in AR.
Read : DR <--M[AR]
Q2. Transfers the content of a data register to a memory word
M selected by the address in AR.
Write: M[AR] <--DR
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Microoperations

• The 4 types of microoperation in digital computers


▪ Register transfer microoperation
▪ Arithmetic microoperation
▪ Logic microoperation
▪ Shift microoperation

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Arithmetic microoperation
• Addition:
• Negate : 2’s complement
• Subtraction : R1 + 2’s complement of R2
• Increment by 1
• Decrement by 1
Binary adder
• To perform this arithmetic operation we need register and
digital component.
• The digital circuit that generates the arithmetic sum of two binary
numbers of any length.
• Constructed with full-adder circuits connected in cascade, with
the output carry from one full-adder connected to the input carry
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of the next full- adder.
Cont….

• An n-bit binary adder requires n – full-adders.


• Full adder = 2-bits sum + previous carry
• c0(input carry), c4(output carry)

Hardware implementation

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Cont….

Binary incrementer
• The increment microoperation adds one to a number in a
register. Implemented with binary counter
• The binary incrementer is constructed with Half-adder
circuits connected in cascade, with the output carry from one
Half-adder connected to the input carry of the next Half-
adder.
For example, if a 4-bit register has a binary value 0110, it will
go to 0111 after it is incremented.
Always

added to 1

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Logic microoperations
• Logic microoperations consider each bit of the register
separately and treat them as binary variables.

• e.g 1010 Content of R1

+ 1100 Content of R2

Special Symbols
Special symbols will be adopted for the0110logic
Content of R1 after P=1
microoperations
OR(∨), AND(∧), XOR(⊕) and complement(a bar on top), to
distinguish them from the corresponding symbols used to
express Boolean functions.
e.g.
Arithmetic Logic
Boolean OR
ADD OR

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Cont….

Hardware implementation
•16 microoperations- Use only 4(AND, OR, XOR, Complement)
•One stage of logic circuit (for n bit circuit we need n diagrams)

S0
S1

Ai

Bi

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Applications of Logic microoperations
• Logic microoperations are very useful for manipulating
individual bits or a portion of a word stored in a register.
• Used to change bit values, delete a group of bits, or insert new
bit values.
❖ Selective-set
▪ The selective-set operation sets to 1 the bits in register A where there are
corresponding 1’s in register B. It does not effect bit positions that have
0’s in B.
1010 A before

1100 B(Logic Operand)

❖ Selective-complement : 1110 A After

▪ The selective-complement operation complements bits in A where there


are corresponding 1’s in B. It does not effect bit positions that have 0’s in
B 1010 A before
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1100 B(Logic Operand)
Cont….
1 0

❖ Selective-clear
▪ The selective-clear operation clears to 0 the bits in A only where there are
corresponding 1’s in B. 1010 A before

1100 B(Logic Operand)


0 0

❖ Selective-mask 0010 A After

▪ Similar to the selective-clear operation except that the bits of A are cleared only
where there are corresponding 0’s in B
1010 A before
1100 B(Logic Operand)
1000 A After

❖ Insert operation
▪ The insert operation inserts a new value into a group of bits
▪ This is done by first masking the bits and then ORing them with the
required value
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Cont….

1) Mask 2) OR
0110 1010 A before 0000 1010 A before
0000 1111 B mask 1001 0000 B insert

0000 1010 A after mask 1001 1010 A after insert

❖ Clear
▪ The clear operation compares the words in A and B and produces an all
0’s result if the two numbers are equal.

0110 A
0110 B
0000 A after clear

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Shift Microoperation

• Shift microoperations are used for serial transfer of data.


• Used in conjunction with arithmetic, logic and other processing
operations.
• The Content of the register can be shifted to the left or right.
• The first flip-flop receives its binary information from the
serial input.
• The information transferred through the serial input determines
the type of shift.
• Three types of shift microoperation : Logical, Circular, and
Arithmetic.

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Types of Shift microoperation
1.Logical Shift
•is one that transfers 0 through the serial input.
•The bit transferred to the end position through the serial input is
assumed to be 0 during a logical shift(Zero inserted).

2. Circular Shift(Rotate operation)


• Circulates the bits of the register around the two ends without loss of
information

Q1. Starting from an initial value of R= 11010101, determine the


sequence of binary values in R after a logical shift-left, followed by
a circular shift- right, followed by a logical shift- right and a
circular shift-left.
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Cont….

Solution
R= 11010101
logical shift-left(shl R) = 10101010
circular shift- right(cir R)= 01010101
logical shift- right(shr R) = 00101010
circular shift-left(cil L) = 01010100
3. Arithmetic Shift
▪ An arithmetic shift shifts a signed binary number to the left or right
▪ Arithmetic shifts must leave the sign bit unchanged because the sign of
the number remains the same
▪ Negative numbers represent by 2’s complement

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Cont….

Shift right Shift left : 0 insert

LSB lost

Sign reversal occur : Overflow F/F V =1


s

▪ An overflow flip-flop V, can be used to detect an arithmetic shift-left overflow.


Q1. An 8-bit register contains the binary value 10011100, what is the register value after an
arithmetic shift right? Starting from the initial number 10011100, determine the register
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value after an arithmetic shift-left and state wether there is an overflow or not.
Cont….

Solution
R= 10011100
▪ arithmetic shift right(ashr R) = 11001110
Since there is no change to sign bit in division, we put the sign bit.

▪ arithmetic shift left(ashl R) = 00111000


• There is an overflow because a negative number changed to a
positive.

Q2. R= 10101000. ashl ?🡺


01010000, and over flow. b/c 1🡺0

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