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    NAND-NOR Implementation

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    S.Haribabu SNS
    This document discusses the implementation of logic gates using NAND and NOR gates. It explains that any boolean function can be created using AND, OR, and NOT gates, and these can also be implemented using only NAND or NOR gates. Specifically, it describes how a NAND gate with a single input acts as a NOT gate, and how an AND gate can be constructed by placing an inverter after a NAND gate. Similarly, it explains that a NOR gate with an inverter after it implements an OR gate functionality. Symbolic and graphical representations of NAND and NOR gates are also presented.

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    NAND-NOR Implementation

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    S.Haribabu SNS
    6 views12 pages
    This document discusses the implementation of logic gates using NAND and NOR gates. It explains that any boolean function can be created using AND, OR, and NOT gates, and these can also be implemented using only NAND or NOR gates. Specifically, it describes how a NAND gate with a single input acts as a NOT gate, and how an AND gate can be constructed by placing an inverter after a NAND gate. Similarly, it explains that a NOR gate with an inverter after it implements an OR gate functionality. Symbolic and graphical representations of NAND and NOR gates are also presented.

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    digital electronics

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    This document discusses the implementation of logic gates using NAND and NOR gates. It explains that any boolean function can be created using AND, OR, and NOT gates, and these can also be implemented using only NAND or NOR gates. Specifically, it describes how a NAND gate with a single input acts as a NOT gate, and how an AND gate can be constructed by placing an inverter after a NAND gate. Similarly, it explains that a NOR gate with an inverter after it implements an OR gate functionality. Symbolic and graphical representations of NAND and NOR gates are also presented.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as pptx, pdf, or txt
    6 views12 pages

    NAND-NOR Implementation

    Uploaded by

    S.Haribabu SNS
    This document discusses the implementation of logic gates using NAND and NOR gates. It explains that any boolean function can be created using AND, OR, and NOT gates, and these can also be implemented using only NAND or NOR gates. Specifically, it describes how a NAND gate with a single input acts as a NOT gate, and how an AND gate can be constructed by placing an inverter after a NAND gate. Similarly, it explains that a NOR gate with an inverter after it implements an OR gate functionality. Symbolic and graphical representations of NAND and NOR gates are also presented.

    Copyright:

    © All Rights Reserved
    Download as PPTX, PDF, TXT or read online from Scribd
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    Download as pptx, pdf, or txt
    of 12

    SNS COLLEGE OF TECHNOLOGY

    Coimbatore-35
    An Autonomous Institution

    Accredited by NBA – AICTE and Accredited by NAAC – UGC with ‘A+’ Grade
    Approved by AICTE, New Delhi & Affiliated to Anna University, Chennai

    DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING


    19ECB231 – DIGITAL ELECTRONICS
    II YEAR/1 III SEMESTER

    UNIT 1 – MINIMIZATION TECHNIQUES AND LOGIC GATES

    TOPIC – NAND-NOR IMPLEMENTATION


    NAND and NOR implementation

     Any Boolean function can be created using AND OR and NOT gates.

    AND, OR and NOT gates can be implemented using NAND and NOR gates.

    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 2/12


    NAND implementation - Implementation
    of NOT and AND using NAND gate

    A NAND gate with single input acts like a NOT gate.


    As a NAND gate is the invert of AND so by putting an inverter on the
    output of NAND we can have AND gate.

    AND Gate NAND Construction of ANDG ate

    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 3/12


    Symbolic Equivalence of NAND Gate

    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 4/12


    NOR implementation - Implementation of
    OR gate using NOR gate
    As NOR is the invert of OR gate so by putting an inverter in the output of
    NOR we get OR gate

    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 5/12


    Graphical equivalence of NOR gate

    By De Morgan's Law we can describe NOR gate graphically by the following
    symbols

    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 6/12


    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 7/12
    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 8/12
    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 9/12
    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 10/12
    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 11/12
    THANK YOU

    03/04/2024 NAND- NOR Implementation /19ECB231/ DIGITAL ELECTRONICS/E.CHRISTINA DALLY,AP/ECE/SNSCT 12/12

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