22AIE102

ELEMENTS OF COMPUTING
SYSTEM– 1

Project Presentation
GROUP-B3

TEAM MEMBERS
1) JAINITHISSH S (CB.SC.U4AIE23129)
2) NITHESHKUMMAR C (CB.SC.U4AIE23155)
3) AKHILESH KUMAR S (CB.SC.U4AIE23170)
4) MOHAN RAJ S (CB.SC.U4AIE23147)
 PROJECT TITLE
DESIGN AND IMPLEMENT A 16 BIT HACK CPU

INTRODUCTION
PART - A
The 16-Bit Hack CPU is a computer processing unit
designed to operate with a reduced instruction set
architecture (RISC) in a 16-bit environment. Inspired by the
simplicity and elegance of the Hack computer architecture
from the book "The Elements of Computing Systems," this
CPU aims to provide a compact yet efficient platform for
various computing tasks.
 OBJECTIVE
To study the principle behind computer architecture, including the components like ALU(Arithmetic Logic
Unit), control unit, memory, and input/output.

 To create a set of instructions that the CPU will understand and execute. This includes defining the opcodes,
addressing modes, and instruction formats.

To create an assembler that translates assembly language instructions into machine code that the CPU can
execute
PROPOSED IMPLEMENTATION OF THE
COMPUTER CHIP
KIND OF INSTRUCTIONS

TWO TYPES :
1. 16-bit A-instruction
2. 16-bit C-instruction
MEMORY DESIGN
CPU DESIGN
CHIP MEMORY CODE
HDL CODE FOR CPU
RESULT: CPU OUTPUT
MEMORY OUTPUT
CONCLUSION:

In conclusion, the Hack CPU project has not only provided a practical
application of theoretical knowledge but also instilled a profound
appreciation for the elements of computing. The experience gained from
this project extends far beyond the technical aspects, offering insights into
problem-solving, attention to detail, and the iterative nature of
engineering. It leaves behind a solid foundation of knowledge and
experience.
 PROJECT TITLE
Design and Implement a 2-bit Serial Binary Adder using an SR flip flop

PART - B INTRODUCTION
In the realm of digital circuit design, this project focuses on crafting a 2-bit
Serial Binary Adder using SR flip-flops. By emphasizing the principles of
binary arithmetic and sequential logic, the project aims to delve into the
intricacies of building a functional binary adder. The exploration of SR flip-
flops as essential components in this context allows for a comprehensive
understanding of their role in sequential circuitry. This project serves as a
gateway to unraveling the complexities of digital systems, offering valuable
insights into the synthesis of sequential binary adders without direct hands-on
involvement.
 OBJECTIVE
1.Binary Addition Fundamentals: Develop a clear understanding of binary arithmetic principles and their application in the
context of digital circuit design, laying the groundwork for the construction of a 2-bit Serial Binary Adder.

2.Sequential Logic Exploration: Investigate the nuances of sequential logic, with a specific focus on how it influences the
design and operation of binary adders. Gain insights into the temporal aspects of information processing in digital systems.

3.Educational Insights: Create a resource that provides educational insights into the synthesis of a 2-bit Serial Binary Adder,
serving as a reference for individuals seeking to understand the fundamentals of digital circuit design.

4.SR Flip-Flop Understanding: Examine the characteristics and functionality of SR flip-flops as key building blocks in
sequential circuits. Understand how these bistable multivibrators contribute to the storage and manipulation of binary
information.

5.Circuit Synthesis and Implementation: Apply theoretical knowledge to synthesize a 2-bit Serial Binary Adder using
SR flip-flops. Develop the skills to translate conceptual designs into practical implementation in HDL platform.
 DESIGN

Sout

ca
car
in1 s SR
FULL True
in2 ADDER FLIP-
ca FLOP
nca

ca OR Cout
GATE
fals
e

NOT nca
GATE
HDL CODE
FULL ADDER
HDL CODE

SR FLIP FLOP
HDL CODE
2-BIT SERIAL BINARY ADDER
 OUTPUT
FOR eg., to add the 2 bit binary number 01 and 01

LSB
0 1 LSB
0 1 SUM OUT 0
=
CARRY 1
OUT =
 OUTPUT

MSB
0 1 MSB
0 1 SUM OUT 1
=
CARRY 0
OUT = 0
1
 CONCLUSION
In conclusion, our 2-bit serial binary adder project successfully implemented a compact and efficient circuit for sequential
binary addition. The bit-serial approach proved effective in optimizing hardware resources. Testing validated the accuracy and
reliability of the design. While meeting project goals, there's potential for future enhancements in speed and scalability. Overall,
our project deepened understanding of digital circuits and binary arithmetic, serving as a foundation for further exploration in
this field.
REFERENCES
https://www.geeksforgeeks.org/serial-binary-adder-in-digital-logic/

https://www.geeksforgeeks.org/sr-flip-flop/
THANK YOU