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Session 8 Design Procedure 1
Session 8 Design Procedure 1
DESIGN PROCEDURE
Session - 8
To familiarize students with the basic concept of the various design procedure for the digital logic circuits
INSTRUCTIONAL OBJECTIVES
LEARNING OUTCOMES
• An Algorithmic State Machine (ASM) diagram offers several advantages over conventional state
diagrams. For larger state diagrams, ASM diagrams are easier to interpret. Conditions for a proper state
diagram are automatically satisfied. ASM diagrams are easily converted to other forms.
• It is a special type of flow chart that is used to describe the sequential operations of a digital circuit. The
ASM chart determines the sequence of events, timing relationship between the states of sequential
controller and the events that happen while going from one state to another.
Reaction-timer Circuit
ASM Chart for the Reaction Timer
CREATED BY K. VICTOR BABU
SUMMARY
• Operation of a digital system can be easily understood by inspection of the SM chart. ASM charts
represent physical hardware. The ASM chart are equivalent to a state graph, and it leads directly to a
hardware realization.
• ASM charts can be described the operation of both combinational and sequential circuits. ASM charts
are easier to understand and can be converted several equivalent forms. The ASM chart may be
equivalently expressed as a state and output table.
(a) … Memory
(b) … Latches
(d) … Flip-flop
Reference Books:
1. 1. Bob Zeidman, “Designing with FPGAs and CPLDs”, CMP Books, ISBN: 1-57820-112-8.
2. Stephen Brown and Zvonko Vranesic “Fundamentals of Digital Logic with Verilog Design”
McGraw-Hill.
3. Pak K. Chan, Samiha Mourad, “Digital Design Using Field Programmable Gate Array”,
Pearson Education – 2009
Sites and Web links:
1. https://archive.nptel.ac.in/courses/108/104/108104091/
2. https://www.youtube.com/watch?v=mHvV_Tv8HDQ