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Introduction to Computer Architecture

Lecture 1 – Introduction

August 18 th, 2008

www.qatar.cmu.edu

Computer Architecture Fall 2008 ©


Teaching
Staff
•Instructors
- Prof. Majd F. Sakr (msakr@cmu.edu)
- Prof. Nael Abu-Ghazaleh
(naelag@cmu.edu)

•TA
- Adnan Majeed (amajeed@qatar.cmu.edu)

Computer Architecture Fall 2008 ©


Where Do We Find a Computer/Processor?
ATMs Planes
ipod PDA
Cameras

Cars
Watch Cell phones
Traffic
Controller
Music
Design &
Engineering

Robots
Games Microwave

Medical
(MRI)
Computer Architecture Fall 2008 ©
Why Did We Develop
Computers?
A solution to a
problem! Problem

While thinking of a solution, Solution


think about:
• Cost $$$ Implementation

• Speed
Computer
• Energy/Power
Result
• Size
• Efficiency
• etc…

Computer Architecture Fall 2008 ©


Types of
Computers
° Personal Computer
° Workstation
° Server
° Supercomputer
° Embedded

Computer Architecture Fall 2008 ©


Number of Computers
Sold
1200 Embedded 1122
Desktops
Millions of Computers

1000 Servers 892 862


800

600 488

400 290

200 114 135 129 131


93
3 3 4 4 5
0
1998 1999 2000 2001 2002

Computer Architecture Fall 2008 ©


Computer
Architecture
Our Area of Understanding

Problem

Our Area of Solution


Focus
Implementation

Compiler

Computer

Result

Computer Architecture Fall 2008 ©


Where is “Computer Architecture and Engineering”?

Application (MediaPlayer)
Operating
Compiler System
Software Assembler (Windows XP)
Instruction Set
Hardware Processor Memory I/O system Architecture

Datapath & Control


Digital Design
Circuit Design Architecture
transistors

*Coordination of many levels of abstraction

Computer Architecture Fall 2008 ©


Anatomy: 5 components of any
Computer
Personal Computer

Computer Keyboard,
Processor
Mouse
Memory Devices

(where
Disk
Control Input
programs (where
(“brain”) programs
&
data & data
Datapath live when live when
(“work”) Output not running)
running)
Display,
Printer

Computer Architecture Fall 2008 ©


Computer Technology - Dramatic
Change!
° Processor
•2X in speed every 1.5 years (since ‘85);
100X performance increase in last decade.
° Memory
•DRAM capacity: 2x / 2 years (since ‘96);
64x size improvement in last decade.
° Disk
•Capacity: 2X / 1 year (since ‘97)
•250X size increase in last decade.

Computer Architecture Fall 2008 ©


Tech. Trends: Microprocessor Complexity

2 * transistors/Chip Every 1.5 to 2.0 years


Called “Moore’s Law”
Computer Architecture Fall 2008 ©
Architecture &
Organization
° Computer Architecture
•What the “low level” programmer sees
- Types of Instructions
- Number of Registers
- Types of Operations

° Computer Organization
•How the designer Implements the
Design
- Layout
- Interconnection (wires)

Computer Architecture Fall 2008 ©


Computer Architecture and Organization

Application (MediaPlayer)
Operating
Compiler System
Software Assembler (Windows XP)
Instruction Set
Architecture
Architecture
Hardware Processor Memory I/O system
Datapath & Control
Layout & Technology
Digital Design Organization
Circuit Design
Transistor
s

Computer Architecture Fall 2008 ©


Architecture &
Organization 1
° Architecture is those attributes visible to the
programmer
• Instruction set, number of bits used for data
representation, I/O mechanisms, addressing
techniques.
• e.g. Is there a multiply instruction?

° Organization is how features are implemented


• Control signals, interfaces, memory technology.
• e.g. Is there a hardware multiply unit or is it done by
repeated addition?

Computer Architecture Fall 2008 ©


Architecture &
Organization 2
°All Intel x86 family share the same
basic architecture
°The IBM System/370 family share the
same basic architecture
°This gives code compatibility
•At least backwards

°Organization might highly differ


between different versions

Computer Architecture Fall 2008 ©


Course Input Input

Path
M ultiplicand M ultiplier

32

Instruction Sets
M ultiplicand
R egister L oad M p

Arithmetic
32= > 34
s ig nE x
32
<<1
34
34
32= > 34 1 0
s ig nE x 34x2 M U X
M u lti x2 /x1

opcode rs rt 34 34

rd shamt funct
3 4 -b it A L U S u b /A d d
C on trol
L og ic
34

rs rt rd shamt funct 32 2 32 S h iftA ll

opcode E N C [2 ]

LO[1]

Encoder
2 H I register 2 LO register

2 bits

Booth
E N C [1 ]

Extra

Prev
(16x2 bits) (16x2 bits)
E N C [0 ]

opcode rs rt offset 2

LoadLO
ClearHI
LoadHI
L O [1 :0 ]

32 32

opcode rs rt immediate R esult[H I] R esult[LO ]

opcode rs rt rd shamt funct

Performance
Computer Architecture
00 µProc
60%/yr.
CPU
(2X/1.5yr)
“Moore’s Law”

100 Processor-Memory

Fall ‘08
Performance Gap:
(grows 50% / year)

10

Y
DRAM
9%/yr.
DRAM (2X/10 yrs)
1

O
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000

Time

Datapaths & U
R
Control
C
I/O P
U
Memory Systems
Computer Architecture Fall 2008 ©
Homeworks and
Projects
° Quizzes (weekly)
° Assignment (every ~2 weeks)
° Project (every ~3-4 weeks)

°End of Semester Project:


• Demo
• Oral Presentation
• Head-to-head Race
• Final Report

Computer Architecture Fall 2008 ©


Course
Exams
° Reduce the pressure of taking exams
•Exam I
•Exam II
•Final
° Goal
•Our goal: test knowledge vs. speed
writing
(no memorization)
•Review meetings: before?

Computer Architecture Fall 2008 ©


Gradin
g
°Grade breakdown
•Exam I: 10%
•Exam II: 10%
•Final: 20%
•Projects 40%
•Homeworks 10%
•Quizzes 5%
•Attendance/Participation: 5%
°No late homeworks or projects!
°Written request for changes to grades

Computer Architecture Fall 2008 ©


Our
Goals
° Show you how to understand modern computer
architecture in its rapidly changing form

° Show you how to design by leading you through the


process on challenging design problems and by
examining real designs

° Learn application analysis and new design


techniques

Computer Architecture Fall 2008 ©


Te
xt
° Required:Computer Organization
and Design,
3rd Edition, Patterson and
Hennessy (COD)
° Reference: Computer Organization
and Architecture, 6thEdition,
William Stallings
• Readings on web page
http://williamstallings.com/COA6e.html

° Reference: Structured Computer Organization,


4th Edition, Andrew S. Tanenbaum

Computer Architecture Fall 2008 ©


The
Big Picture

Computer Architecture Fall 2008 ©


Types of
Processors

Computer Architecture Fall 2008 ©


Hardware/Software
Divide
Excel
Internet Explorer
Visual Studio
Applicatio
n m So
s te ftw Windows XP
S y a re Linux
Solaris
Hardwar OS X
e

PC
MAC
SUN

Computer Architecture Fall 2008 ©


Program Path to
Execution
High Level
Language
Program (.c file)

Compile
r
Assembly
Language
Program (.asm
file)

Assembler

Binary Machine
Language
Program (.exe
file)
Computer Architecture Fall 2008 ©
The Five Components of a
Computer

Computer Architecture Fall 2008 ©


The Motherboard:

The five von


Neumann Input
components: &
Output

ALU
&
CU

Computer Architecture Fall 2008 ©


Motherboa
rd

Computer Architecture Fall 2008 ©


Inside the
Processor

Computer Architecture Fall 2008 ©


Manufacturing
Process

Computer Architecture Fall 2008 ©


An 8-inch (200-mm) Diameter
Wafer

Computer Architecture Fall 2008 ©


Modern
Fabs
° Current minimum feature size is
45nano meters (45x10 -9 meters)
° Can fit over a million transistors on
the tip of a hair
° Fab facility costs 3 billion US $
•Many chip designers are fab-less
° Employs 100s of employees
° Yield on the order of 30%

Computer Architecture Fall 2008 ©


Computer’s History

1st generation: Vacuum


Tubes
°During World War 2 the
Army’s Ballistics
Research Laboratory
employed more than 200
people to solve essential
ballistics equations using
desktop calculators.

Computer Architecture Fall 2008 ©


1st generation: Vacuum
Tubes

Professor Mauchly (EE)


& his gradate student Eckert
proposed to build a general
purpose computer using vacuum
tubes for the Ballistics Research
Laboratory (BRL)

Computer Architecture Fall 2008 ©


ENIAC (Electronic Numerical Integrator And Computer)
° ENIAC built in World War II was the first general purpose computer
• Used for computing artillery firing tables
• 24 meters long by 2.5 meters high and several meters wide
• Each of the twenty 10 digit registers was 1 meter long

–Since then:

Moore’s Law:

transistor capacity doubles


every 18-24 months

Computer Architecture Fall 2008 ©


1st generation: ENIAC Completed in
1946 ° Decimal (not binary)
Programming the
ENIAC
° 20 accumulators of 10 digits
° Programmed manually by switches &
cables 0 1 2 3
9 4
° 18,000 vacuum tubes
8 5
° 30 tons 7 6

° 15,000 square feet


° 140 kW power consumption
° 5,000 additions per second

Computer Architecture Fall 2008 ©


The von Neuman machine - Completed 1952

° Stored Program concept


Scientist at the
Institute of
Advanced
° Main memory storing programs
Studies and data
° ALU operating on binary data
° Control unit interpreting
instructions from memory and
executing
° Input and Output equipment
operated by control unit

Computer Architecture Fall 2008 ©


Structure of von Neumann
Machine Central Processing Unit
CPU

CA
Arithmetic –Logic Unit

Main Input/Output
Memory Equipment
M Program Control Unit
I/O
CC

Computer Architecture Fall 2008 ©


Commercial
Computers
° 1947 - Eckert-Mauchly Computer
Corporation
° 1st successful machine:
UNIVAC I (Universal Automatic Computer)
° Commissioned by the US Bureau of
Census for the 1950 calculations
° Became part of Sperry-Rand Corporation
° Late 1950s - UNIVAC II
• Faster
• More memory
• Upward Compatibility

Computer Architecture Fall 2008 ©


2nd Generation:
Transistors
° Replaced vacuum tubes
° Smaller & Cheaper
° Less heat dissipation
° Solid State device
(silicon)
° Invented 1947 at Bell
Labs
The First Transistor

Computer Architecture Fall 2008 ©


Transistor Based
Computers
° Second generation machines
° NCR & RCA produced small
transistor machines
° IBM 7000
° DEC - 1957
•Produced PDP-1

Computer Architecture Fall 2008 ©


Microelectronics

° Literally - “small electronics”


° A computer is made up of gates,
memory cells and interconnections
° These can be manufactured on a
semiconductor
° e.g. silicon wafer

Computer Architecture Fall 2008 ©


Growth in CPU
Transistor Count

Computer Architecture Fall 2008 ©


Moore’s
Law
° Increased density of components on chip
° Gordon Moore - cofounder of Intel
° Number of transistors on a chip will
double every year
° Since 1970’s development has slowed a
little
• Number of transistors doubles every 18
months
° Cost of a chip has remained almost
unchanged

Computer Architecture Fall 2008 ©


Moore’s Law - Cont’d

° Higher packing density means shorter


electrical paths, giving higher
performance

° Smaller size gives increased flexibility

° Reduced power and cooling requirements

° Fewer interconnections increases


reliability

Computer Architecture Fall 2008 ©


Moore’s Law—Will it
continue?
° A number of “walls” on the horizon
• Physical process wall: impossible to
continue shrinking transistor sizes
- Already leading to low yield, soft-errors,
process variations
• Power wall
- Power consumption and density have also
been increasing
• Other issues:
- What to do with the transistors?
- Wire delays
- Memory and I/O walls
- New architectures? Multi-cores
Computer Architecture Fall 2008 ©
Yield Trends with Process
Size

Computer Architecture Fall 2008 ©


Computer Architecture Fall 2008 ©
Computer Architecture Fall 2008 ©
Computer
Generations
Generatio Dates Technology Operations
n per Second
1 1946- Vacuum Tube 40,000
1957
2 1958- Transistor 200,000
1964
3 1965- Small & Medium 1,000,000
1971 Scale Integration
4 1972- Large Scale 10,000,000
1977 Integration (LSI)
5 1978-… Very Large Scale 100,000,000
Integration (VLSI)

Computer Architecture Fall 2008 ©


And in
conclusion...
° Continued rapid improvement in
Computing
•2X every 1.5 years in processor speed;
every 2.0 years in memory size;
every 1.0 year in disk capacity;
Moore’s Law enables processor, memory
(2X transistors/chip/ ~1.5 ro 2.0 yrs)
° 5 classic components of all computers
Control Datapath Memory Input Output
}
Processor
Computer Architecture Fall 2008 ©

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