COMPUTER Instructor:

ARCHITECTURE
Performance Measurement And
Evaluation
Many Dimensions to Performance
• CPU execution time
 by instruction or sequence P
 floating point
 integer
 branch performance $
• Cache bandwidth
• Main memory bandwidth
• I/O performance M
 bandwidth
 seeks
 pixels or polygons per second

• Relative importance depends on applications

B A S IC H A R D W A R E A R C H IT E C T U R E O F A M IC R O C O M P U T E R
 BASIC HARDWARE ARCHITECTURE OF A
MICROCOMPUTER
A microcomputer is composed of four functional units:
1. The CPU (Central Processing Unit)
• It is the electronic circuitry within a computer that executes the instructions of
a computer program by performing the basic arithmetic, logical, control and
input/output operations specified by the instructions.
• The CPU is connected with a clock generator circuit, which provides oscillating
square wave pulses to control and synchronize the basic timing of the
computer.
• Principal components of a CPU include:
• Arithmetic logic unit (ALU) that performs arithmetic and logic operations.
• Processor registers that supply operands to the ALU and store the results
of ALU operations
• Control unit that orchestrates the fetching and execution of instructions by
directing the coordinated operations of the ALU, registers and other
components.
 2. Memory unit
It is part of computer hardware that is used to read/write information.
Microcomputers have two types of memory units:
 Primary memory or main memory is the one that directly accessible to the CPU.
The CPU continuously reads instructions stored there and executes them as
required.
 Primary memory is normally smaller in size and temporarily stores active
information.
 It is implemented using CPU-registers, Caches, Random access memories
(RAM), Read only memories (ROM).
 Secondary memory, Auxiliary memory or External memory is a non-volatile
memory that is not directly accessible by the CPU, because it is not accessed via
the input/output channels.
 Secondary memory is normally large and used for long-term storage of
information that is not currently being used by the PC.
 Typically this memory represents the external storage media and hard disks.
There are two types of memory:
 Volatile is a memory that requires power to maintain the stored information; it
retains its contents while powered on but when the power is interrupted the
stored data is lost very rapidly or immediately
 Examples of volatile memory are primary storage, which is typically dynamic
random-access memory (DRAM), and fast CPU cache memory, which is
typically static random-access memory (SRAM) that is fast but energy-
consuming.
Ref: https://www.youtube.com/watch?v=Hf5qe6lWVCs
 Non-volatile is a memory that can retrieve stored information even after having
been power cycled (turned off and back on).
 Examples of non-volatile memory are flash memory (used as secondary
memory) and ROM, PROM, EPROM and EEPROM memory (used for storing
firmware such as BIOS).
 3. Input/output unit
Input/output unit allows the communication between a processing unit and the
outside world
I/O devices (Peripheral Devices) are the pieces of hardware used by a human (or
other system) to communicate with a computer.
 For example, a keyboard or computer mouse is an input device for a computer,
while monitors and printers are output devices. Devices for communication
between computers, such as modems and network cards, typically perform both
input and output operations.
 4. Bus System
• A bus is a common group of wires that interconnect components in a computer
system.
• The buses that interconnect the sections of a computer system transfer
address, data, and control information between the microprocessor and its
memory and I/O systems.
• In the microprocessor based computer system, three buses exist for this
transfer of information: address, data, and control.
 Address-bus that carries physical address of memory or I/O storage
locations),
 Data-bus that carries data to be read or written into the memory or I/O
location.
 Control-bus that carries information that controls the read or write
operation.
• In each case, the total number of wires available for the task determines the
width of that bus. Thus, a 4-bit data bus means four electrical lines (outside the
CPU) are available to carry four binary digits (bits) of data from or into the
CPU).
 4. Bus System
• Two type of Memory Access:
• Von Neumann architecture
• One address bus and one data
bus.
• The same address and data
buses serve both program and
data memories.
• Harvard architecture
• Every memory area gets its own
address bus and its own data
bus
8086 CPU ARCHITECTURE
8086 CPU BLOCK DIAGRAM
Intel 8086 is a 16-bit microprocessor.
The term “16-bit” means that its arithmetic logic unit, internal registers, and
most of its instructions are designed to work 16-bit binary words.
It has 16-bit data bus and 20-bit address bus.
Words will be stored in two consecutive memory locations.
The 8086 CPU is divided into two independent functional parts, the bus interface
unit (BIU), and the execution unit (EU).
Bus interface unit (BIU)
• The BIU handles all data and addresses on the buses for the execution unit
• sends out addresses, fetches instructions from memory,
• reads data from ports and memory
• writes data to ports and memory.
• In BIU there are so many functional groups or parts these are as follows:
1. Instruction Queue
• To increase the execution speed, BIU fetches as many as six instruction
bytes ahead to time from memory.
• The pre fetched instruction bytes are held a instruction queue using (FIFO).
• It reads the instruction from this instruction queue, when the EU is ready for its
next instruction.
• Pipelining: Fetching the next instruction while the current instruction executes.

2. Segment Registers
• Within the 1MB of memory space,
there are four 64Kbyte memory
blocks:
• Code segment (CS): holds the
program instruction code.
• Data segment (DS): stores data for
the program.
• Extra segment (ES): an extra data
segment.
• Stack segment (SS): store the
interrupt and subroutine return
addresses.
2. Segment Registers
• The BIU contains four 16-bit segment registers.
• These segment registers are used to hold the upper 16 bits of the
starting address (point at location 0) for each of the segments.
3. Instruction Pointer (IP)
• The instruction pointer (IP) holds the 16-bit address of the next code
byte within this code segment
 Execution unit (EU)
The execution unit (EU) tells the BIU where to fetch instructions or data from,
decodes instructions, and executes instructions.
The functional parts of the execution unit are:
• Control circuitry or system: performs various internal operations
• Instruction decoder: translates instructions fetched from memory to generate
different internal or external control signals that required performing the
operation
• Arithmetic logic unit (ALU): performs arithmetic operations such as add, subtract
etc. and logical operations such as AND, OR, XOR, increment, decrement.

1. Flag Register
• A 16-bit flag register indicates some condition produced by the execution of
an instruction of the EU
• They are modified automatically by CPU after mathematical operations.
2. General Purpose Registers
The EU has four 16-bit general purpose register: A, B, C, D.
Each register can be accessed as a Byte (8 bits) or a word (16 bits).
Example, AX = AH(high nibble) + AL (low nibble).
The General purpose register can be used in any manner by the person
programming the microprocessor.
Normally, they are used to hold a temporary results during the execution of
the instructions.
Accumulator Register -stores operands for arithmetic operations.
(AX ) -hold the offset address of a location in the
memory system.
Base Register (BX) - used as base index, holds the offset address of a
location in the memory
Count Register (CX) -used in loop instruction to store loop counter
- hold the offset address of memory data
Data Register (DX) -used to contain I/O port address for I/O instruction.
- holds a part of the result from a multiplication or part of the
dividend before a division
3. Pointer and Index Registers

Stack pointer contains the 16-bit offset from the start of the segment to
(SP) the memory location where a word was most recently
stored on the stack (Top of the stack)
Base pointer points to a memory location
(BP)
Source index addresses source string data for the string instructions.
(SI)
Destination addresses string destination data for the string instructions.
Index (DI)