BLOCK DIAGRAM OF MSP-430

PRESENTED BY:

B.VARSHA
INTRODUCTION:

MSP-430 is a Mixed-Signal microcontroller family from Texas Instruments.

Introduced on 14th February 1992.
Designed for Low cost and Low power consumption.
16-bit processor with a von-Neumann architecture.
CPU described as RISC(Reduced Instruction Set Computer).
Address bits=16 Bits.
Data bits=16 Bits.
 BLOCK DIAGRAM OF MSP-430

ACLK
Clock
System Flash RAM Port
SMCLK
MCLK
MAB
JTAG/Debug

RISC
CPU
16-Bit MDB

ACLK
Analog Digital
Watchdog
Peripheral Peripheral
SMCLK
CLOCK GENERATOR:

Clock generator has three internal clocks, namely:

• MCLK(Master Clock)
• SMCLK(Subsystem Master Clock)
• ACLK(Auxiliary Clock)
INTERNAL CLOCKS:
• SMCLK and ACLK both are distributed to Peripherals.
• MCLK is used by the CPU.
• SMCLK and MCLK runs at Mega Hertz(M Hz) range.
• ACLK runs at Kilo Hertz(K Hz) range.
CPU:
• It includes a 16-bit ALU and a set of 16 registers R0-R15.
• Here first 4 registers are Special purpose Registers and remaining are General purpose
Registers.
• ALU performs arithmetic and logical operations and stores result in any of the registers.
SPECIAL PURPOSE REGISTERS:
• Ro-PC(Program Counter)
• R1-SP(Stack Pointer)
• R2-CG1/SR(Constant Generator/Status Register)
• R3-CG2(Constant Generator)

GENERAL PURPOSE REGISTERS:

• R4-R15
JTAG/DEBUG:
• JTAG – Joint Test Action Group.
• Complementary tool.
• Formed in 1985.
• Used for Verifying and Testing.
ANALOG PERIPHERALS:
• A/D converters
• Comparator
• LCD driver
• Supply voltage supervisor, etc.,
DIGITAL PERIPHERALS:
• Watch-dog timer
• 16-bit & 8-bit timers
• Hardware Multiplier
• Universal Serial Communication Interface(USCI),etc.,
MEMORY:
MSP-430 contains 2 memories. Namely,
1. Flash Memory
2. RAM
• Flash memory ranges 2KB to 32KB.
• RAM ranges 128 Bytes to 2KB.
WATCHDOG TIMER:
It is a special timer to perform a controlled system restart after
a software problem occurs. If it is not needed in an application, it acts as
general purpose register.