Chapter Eleven Small-Signal Model and Circuits

Contents of this Chapter:

11.0 Introduction
11.1 Incremental Signal and Variables
11.2 Low-Frequency Small-Signal Transistor
Models
11.3 The Biasing Problem
11.4 Models With Energy Storage

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.0 Introduction
1. Small-signal and large-signal
1) If the operating point of a device, particularly nonlinear device, covers the overall
device characteristic, we call the circuit operating in large-signal mode.
2) If the operating point of a device, particularly nonlinear device, is restricted in a
narrow range of voltage and current, the characteristic is nearly linear and we call
the circuit operating in small-signal mode.
2. Large-signal model and small-signal model
1) Large-signal model: Using a piecewise linear characteristic to approximate the
nonlinear characteristic. For each linear section, we use a combination of ordinary
circuit elements (such as resistor, dependent source) to model the nonlinear devices.
2) Small-signal model: Using the tangent at the static operating point to substitute for
the nonlinear characteristic.

3. Topics of this chapter

1) Biasing Problem: How to determine the static operating point of a active device
(nonlinear).
2) Small-signal model: How to formulate a model for a particular device when its static
operating point is determined.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
11.1 Incremental Signals and Variables
11.1.1 A Small-Signal Amplifier
1. The Voltage Transfer Characteristic
Recall the result of 10.1.1, we redraw
the voltage transfer characteristic

Now we restrict the operating range in a narrow region as the figure. In

this area the characteristic is fairly linear.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
2. About The Input Voltage
To insure the transistor in the active-gain region, the input voltage should have
a DC component, VB, which is called statistic bias voltage. While the signal to be
amplified is carried on the DC bias, which should be a small-increment
component to ensure the transistor not to be in cutoff and saturation regions.
3. Input /Output signals
vB  VB  vb (t ) ; vC  VC  vc (t )
4. Increment Gain
variation in output
Incremental gain=
variation in input
Recall the analysis of 10.1.1, we have incremental
gain, the slope of the transfer characteristic in the
operating range
vC  R
Av   F C The negative sign indicate that the amplifier is
vB RB an inverting amplifier.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
11.1.2 Some Important Notational Shorthand
In our discussion, the voltage or current involves two components:
DC component (operating point) and incremental component (signal). In
order to distinguish them, we adopt a shorthand notation for a variable:
Variable Letter Subscript Meaning
Capital Capital DC component
Capital Low-case MSE of AC component
Low-case Capital DC+AC
Low-case Low-case AC component

For examples, vB=VB+vb

VB—— DC voltage (capital variable and capital subscript).
vb—— AC voltage (low-case variable and low-case subscript).
Vb—— RMS of vb (capital variable and low-case subscript).
vB—— DC+AC voltage (low-case variable and capital subscript).

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.1.3 The Concept of an Incremental Model
Incremental model is a circuit model for a device that correctly represents
the relation among incremental input and output variables.
Incremental model consists of an assemble of ordinary circuit elements w
hose parameters are determined by the static operating point.
The form of the incremental model and some of the numerical parameters
in the model may depend strongly on the operating point of the device. If the
operating point of the transistor were in the cutoff region an incremental var
iation of vB would not produce any change in vC. In this extreme case, therefo
re, vC would be zero and the incremental voltage gain would be zero. Similarl
y, in saturation, there would be an insignificant incremental variation in vC in
response to a small change in vB. The incremental model for a device, therefo
re, must be tailored to the correct operating point for the specific circuit at h
and. One must first use large-signal analysis to find the operating point and t
hen develop an incremental model appropriate to that operating point.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.2 Low-Frequency Small-Signal Transistor Models

The Assumptions:
1. The time variation of signal is not too rapid, i.e., the signal's frequency is
not too high.
2. The active devices, such as BJT, FET, have been properly biased so that
they operate in active-gain region.
3. In low-frequency (<10kHz) the small-signal models for BJT and FET can
be constructed out of resistive elements.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.2.1 The Basic Hybrid- Model
1. Current distribution of BJT
According to chapter 9, in active region, we have
iC=F iB
F is the average forward current gain. If the input current (or voltage) co
ntains not only DC component but also a small AC component (called incre
ment), then we can represent that
iB=IB+ib
iC=IC+ic
For the DC component (static operating point), we know that
I C = F I B
For the increment component, as we propose in Introduction, using the tan
gent at the static operating point to substitute for the nonlinear characteris
tic.
ic=0 ib
where, 0 is the tangent of current transfer characteristic at static operatin
g point, numerically, it is closed to F. In the transistor data sheets, 0 is de
noted as hfe, and F is denoted as hFE.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
2. The transfer characteristic of BJT iC=f (vBE)
For a NPN transistor, the collector current can be calculated
q
vBE
iC  iE  I ES  e kT

let vBE=VBE+vbe, then

q q
VBE vbe
iC  iE  I ES  e kT
e kT

If the increment of vBE , vbe, is a small signal (<<VT), then we can represent
the collector current approximately:
 q
VBE   q  q
iC   I ES  e kT

  1  vbe   I C  I C  vbe
   kT  kT
Therefore the input and output increments can be represented as
q 1 1 q 1
ic  I C  vbe  g m  vbe ; ib  ic  I C  vbe  vbe
kT 0  0 kT r
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
Where gm is called transconductance 跨导 , r is e-b equivalent increment r
esistance 
q kT
gm  IC ; r   0  0
kT q IC gm

Note: gm and r are dependent of static operating point IC and junction temper
ature. At the room-temperature (27ºC) they may be evaluated numerically as
follows
25.8(mV )
g m ( S )  0.03876 I C (mA) ; r ()   0
I C (mA)
The following are two the small-signal models for a BJT

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.2.2 The Common-Emitter Amplifier
1. Circuit Structure VBE  0.6V (assume)
VCC  VBE
IB 
RB
VCC  VBE
IC   F I B   F 
RB
VCE  VCC  RC I C
Should be larger than the
saturation voltage VCE,sat
2. The Static Operating Point
In static status, or DC status, capacitor C1 and C2 are equivalent to
open-circuit. Thus from the large-signal model (previous chapter) we
can calculate the static operating point currents and voltages.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
3. Small-Signal Model
At the static operating point, we can determine the incremental parameters
of the transistor BJT:
q q VCC  VBE 0 q VCC  VBE
gm  IC   F  ; r   
kT kT RB g m kT RB
Now we yield the incremental model for the common-emitter amplifier:
We first draw the AC (signal) equivalent of the amplifier substituting short-
circuits
Becauseforthe
coupling capacitors,
DC power supply C 1 and
has C2, and voltage
a constant suppressing the DC
between power
terminals,
supply, VCC.
its increment voltage is zero. So in incremental model the DC power
Then substituting an incremental model for the transistor, we yield
supply is equivalent to a short-circuit (called signal short-circuit). If the
capacitance of coupling capacitors C1 and C2 are sufficient large, when the
small signal supplies to the circuit, the voltages of the capacitors would
maintain constant and have not increment components. Therefore, the
coupling capacitors are equivalent to short-circuit in the incremental
model.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
4. The Performance of Amplifier
(1) Incremental Voltage Gain
From the incremental model of the amplifier we can simply yield
r || RB
v   vi v0    g m v   RC
RB  r || RB
Therefore, the voltage gain is

v0 g m RC  r || RB 
Av   
vi RS  r || RB
Usually the bias resistor RB is much larger than r , so RB|| r approximates r .
Then the voltage gain can be simply calculated in the form:
g m RC r RC
Av    0
RS  r RS  r

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
(2) Incremental Current Gain
The input current in the small-signal equivalent model is
vi
ii 
RS  r || RB
The output incremental current in the small-signal equivalent model is

i0   g m v   g m  ii   r || RB 

So the incremental current gain may be calculated as

i0
Ai    g m  r || RB    g m r    0
ii

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
(3) Incremental Input Resistance

By the Thévenin equivalent the incremental input resistance is

vi  RS  ii
Ri   r || RB  r
ii

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
(4) Incremental Output Resistance
In order to compute the incremental output resistance, we suppress the
independent source in the circuit.

Also using the Thévenin equivalent we can simply determine the resistance

R0  RC

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.2.3 A Numerical Example
In the following circuit, F0=50. Let us analyze the performance of this
common-emitter amplifier.

(1) As we discuss in previous section, the static operating point

VCC  VBE 12  0.6
IC   F  50   1.2mA
RB 470

VCE  VCC  RC I C  12  1.2  5  6V

VCC  VBE 12  6
IB    0.24mA
RB 470
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
(2) The parameters of incremental model
I C q 1.2mA 0
gm    0.046 S ; r   1.075k 
kT 25.8mV gm
(3) The incremental model of the circuit

(4) The performances of amplifier

g m r RC RC
Av    0  120 Ai   g m (r || RB )    0  50
RS  r RS  r

Ri  r || RB  r  1.075k  R0  RC 5k 

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
(5) Illustration
If the input signal voltage is vi (t )  2 sin 2000 t mV
Then the output voltage (open-circuit) is
v0 (t )  Av vi (t )  120 2 sin 2000 t mV
Note: To ensure the small-signal analysis remains valid, the net-input volt
age v has to satisfy
kT
| v |  25.8 mV (27C ) or | v | 5mV
q
In our example, it should be satisfied that
ri  RS
| vi | | v | 10mV
ri

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.2.4 The Emitter-Follower Amplifier
1. The Circuit of an Emitter-Follower Amplifier

2. Static Operating Point

Let the capacitors be open-
circuit (DC stable state), we
yield the DC equivalent
circuit for the amplifier

According to KVL, we have RB I B  VBE  RE I E  VCC

In the active region, I E  (1   F ) I B
VCC  VBE
IB  IC   F I B
RB  (1   F ) RE
I E  (1   F ) I B VCE  VCC  RE I E
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
3. Incremental Model
The incremental parameters are
IC q q  F (VCC  VBE ) 0 kT
gm   r    RB  (1   F ) RE 
kT kT  RB  (1   F ) RE  g m q (VCC  VBE )
Let coupling capacitors be short-circuit and DC supply be suppressed, we
yield the incremental model for the amplifier

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
4. The Performance
(1) Incremental Input Resistance
r ib  (1   0 )ib RE
Ri  RB ||
ib
 RB || r  (1   0 ) RE 
(2) Incremental Voltage Gain
vi
v0  (1   0 )ib RE vi  v0  r ib  RS ii ii 
RS  Ri
v0 RS RS (1   0 ) RE
vi  v0  r  vi  A  1
(1   0 ) RE RS  Ri RS  Ri r  (1   0 ) RE
(3) Incremental Current Gain
ie RS  Ri v0 RS  Ri
Ai      Av
ii vi RE RE

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
(4) Incremental Output Resistance
Suppress the input signal source and draw the equivalent circuit

r  RB || RS r  RB || RS
R0  RE || 
1  0 1  0

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
Let's look a numeric example. Let the input voltage be

vi (t )  10 2 sin 2000 t mV
The parameters of elements are shown in the circuit, and the forward
current gain of the transistor is 100.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
VCC  VBE 12  0.6
IC   F  100   1.47mA
RB  (1   F ) RE 470  101 3
kT 25.8
r   0  100   1.75k 
qI C 1.47
Ri  RB || [r  (1   0 ) RE ]  185k 
The emitter-follower has very high incremental input resistance.

r  RS || RB 1.7  1|| 470

R0  RE ||  3k  || k   26.5
1  0 100  1
The emitter-follower has very low incremental output resistance.
Ri (1   0 ) RE
Av    0.989
RS  Ri r  (1   0 ) RE
Then the output voltage (open-circuit) is
v0 (t )  Av  vi (t )  9.89 2 sin 2000 t mV
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
11.2.5 An FET Source Follower
1. The small-signal model for FET
(1) Three considerations:
a. iG=0 2
 vGS 
b. In active region (vGS>VP, vDS>vGS-VP), iD  I DSS   1
 VP 
c. Small signal: vGS=vGS+vgs, and | vgs |<<|VP|
(2) Approximation 2
 VGS  vgs 
iD  I D  id  I DSS   1
 VP 
2 2
 VGS  vgs   VGS   VGS  vgs
 I DSS   1    I DSS   1  2 I DSS   1 
 VP  VP   VP   VP  VP
2
V  I DSS (VGS  VP )
I D  I DSS  GS  1 id  2 2
 vgs  g m  vgs
 VP  VP
The incremental transconductance gm is an important low frequency parameter
of FET. Its typical value is in the range 0.5~5mS.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
(3) The small signal model for FET

2. The Small-Signal model of FET source follower.

An FET source follower is shown as follows

AC (signal) equivalent

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
Substituting the small signal model for the FET in the source follower, we
yield the small signal model for the source follower:

3. The performance of FET source follower

From the small signal equivalent circuit we can find vgs  vg  v0

Because ig=0, we have vg  vs , v0  g m RL vgs

g m RL
Therefore, v0  g m RL (vs  v0 )   vs
1  g m RL

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
(1) The Incremental Voltage Gain
v0 g m RL
Av   0  Av  1
vs 1  g m RL
Generally, the gmRL>>1, therefore, the output voltage is very close to the in
put voltage. So we call the circuit source voltage follower.
(2) The Incremental Input resistance
Since the input current is zero at any input voltage, so the input resistance
of the FET source follower is infinite, Ri=∞.
(3) The Incremental Output Resistance
To determine the incremental output resistance, we suppress the input
signal in the small signal model:

RL
R0 
1  g m RL

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.3 The Biasing Problem 偏 置 问
题
In order to use the active device in application circuits correctly, we
must set a proper static operating point for the active device. The
problem is called biasing.

11.3.1 Factors Influencing Bias Design

1. The device's limitation on power, voltage, and current.

2. The variations in device parameters (unit-to-unit).
3. The temperature will influence the parameters of device.
4. The output signal's amplitude.
5. The dc operating point will influence the parameter of device

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.3.2 Biasing Bipolar Transistors
1. Basic biasing circuit

DC stable equivalent

Assume voltage between base and emitter is constant, 0.6V, in active-gain

region. Then in the input loop of the circuit we have

I B RB  VBE  VCC ( KVL)

VCC  VBE
IB 
RB

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
Applying the current-control relation of the transistor,
VCC  VBE
IC   F I B   F
RB
Finally, applying KVL to the output loop, we have
 F RC
VCE  VCC  I C RC  VCC  (VCC  VBE )
RB
To ensure the transistor works in the active-gain region,
 F RC
VBE  VCE  VCC  (VCC  VBE )
RB
Therefore, the bias resistances should satisfy
 F RC  RB
Notice that the operating point collector current IC is directly proportional to
F, which varies with unit to unit and with temperature. Therefore the operat
ing point is not stable. In many applications, this is not acceptable. Thus mor
e elaborate and more stable schemes are often needed.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
2. Voltage divider biasing circuit

DC equivalent circuit

In input-loop
RB 2
( RB1 || RB 2 ) I B  VBE  RE I E  VCC
RB1  RB 2
Because IE=(1+F)IB, the base bias current, IB, can calculated
RB 2
VCC  VBE
RB1  RB 2
IB 
RB1 || RB 2  (1   F ) RE

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
F  RB 2 
IC   F I B   V  V BE 
RB1 || RB 2  (1   F ) RE  RB1  RB 2
CC

If RB1||RB2<<(1+F)RE and F>>1, then
F  RB 2 
IC  CC  VBEthe
 Where, weVaccept  assumptions:
RE  RB1  RB 2 
RS<<RB1||RB2
It is independent of parameter of transistor,F, and the operating point is stabl
r<<(1+is
e. However, this improved stability 0)R 0>>1
atE cost of the incremental gain drop.
  0 RC
Av 
r  (1   0 ) RE  (1  RS /( RB1 || RB 2 )
  0 RC

r  (1   0 ) RE
RC

RE

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
In the circuit, RE is larger, the operating point is more stable and the incre
mental gain is lower. In fact, the emitter resistor represents a form of negati
ve feedback, which reduces gain and increases stability. This contradiction
may be solved by bypass capacitor 旁路电容 .
If the signal to be amplified is a time-varying signal, we can use a capacitor
to short out the feedback effect of RE for the incremental signals without
destroying the dc stability produced by RE.
In DC equivalent circuit, CE is
equivalent to an open-circuit and does
not affect the static operating point.
However, in AC equivalent circuit, CE
is equivalent to a short-circuit and
eliminates the effect of RE on
incremental gain.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
3. The feedback biasing circuit

Although the voltage divider biasing circuit is useful for single-stage amplifi
ers, it is rarely used for multiple-transistor low-frequency amplifiers. The re
quirement for coupling capacitors between one stage of amplification and t
he next and for bypass capacitors across each emitter resistor have two und
esirable effects: first, increased cost, and, second, a degrading of the respon
se of the amplifier to very-low-frequency signals.
As a result, biasing arrangements for amplifiers involving many transistors
often couple transistors directly 直接耦合 to one another, and then use over
all feedback to maintain operating-point stability.
In many cases, the feedback path incorporates capacitors in a fashion
analogous to the bypass capacitor of voltage divider biasing circuit in order
that the ac gain of the amplifier not be reduced by the DC feedback.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
Let's look an example circuit.
Assume F1>>1, F1>>1 and IB1<<IC2, then

I E 2 RE 2  VBE
I B1 
RB1
VCC  ( I C1  I B 2 ) RC1  VBE
IE2 
RE1  RE 2

From above equations we can solved the operating

point currents of two transistors. The process of
operating point stability can be describe briefly as
follows

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.3.3 Biasing Field-Effect Transistors
Bias networks for field-effect transistors are generally simpler than for bip
olar devices. FETs are less temperature dependent and draw virtually zero
gate current when operating in the active-gain region. Although it is possib
le to construct a large-signal FET model, it is somewhat more complex, and
hence less convenient, than the active-gain region bipolar transistor model.
For this reason we shall concentrate on the use of the graphical output cha
racteristics in designing the bias networks.
We first recall the characteristic of FET

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
(1) JFET and MOSFET in depletion mode

  1 2 
i
D  K  v
 GS  VP   v DS  vDS  voltage-controlled resistance region
2 

 for vGS  VP vDS  vGS  VP

 i  K (v  V ) 2 Active-gain (constant-current) region
 D 2 GS P


 for vGS  VP vDS  vGS  VP

Note:
For N-channel device, pinch-off voltage is negative, VP<0, and iD>0 vDS>0.
For P-channel device, pinch-off voltage is positive, VP>0, and iD<0 vDS<0.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
(2) MOSFET in enhancement mode
  1 2 
i
D  K  GS T  DS 2 vDS  voltage-controlled resistance region
v  V  v 

 for vGS  VT vDS  vGS  VT

 i  K (v  V ) 2 Active-gain (constant-current) region
 D 2 GS T

 for vGS  VT vDS  vGS  VT

Note:
For N-channel device, threshold voltage is positive, VT>0, and iD>0 vDS>0.
For P-channel device, threshold voltage is negative, VT<0, and iD<0 vDS<0.
Therefore, to ensure the FET operates in active-gain region, we have to
properly bias the FET so that
vGS  VP ; vDS  vGS  VP or vGS  VT ; vDS  vGS  VT

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
1. Self biasing circuit 自给偏置电路
(1) Circuit structure

This is a common-source amplifier with N-channel depletion MOSFET. In the

circuit the potential of gate is fixed to zero. Bias voltage vGS is produced by drai
n current flowing through resistance RS. So this biasing circuit is called self-bia
sing circuit.
The resistance RG is used for protecting FET from inductive field, generally
is 1M or higher.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
(2) Operating point calculation
Substituting open-circuit for coupling and bypassing capacitors, we redraw
the DC equivalent of the circuit and determine its static operating point.
Because IG=0, VG=0. If the static drain current is ID, we have

VGS  VG  VRS   I D RS
Recall the FET characteristic
VGS 2
I D  I DSS (1  )
VP
where, IDSS is the drain current at VGS=0.

Solving above equations we may yield the operating point.

However, the result may be very complex and is given in
numeric form in general.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
(3) Design for operating point
Design condition: output peak signal swings vo,max, load resistance RD
a. Determine the allowable range
Draw a load line with slope of -l/RD in the output characteristic of FET.

According to the maximum output signal swing determine the allowable

range of operating point as the figure.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
b. Calculate the bias resistance
Select a static gate-source voltage V'GS in the allowable range of operating
point. Then the source bias resistance may be calculated
V 'GS
RS  
I 'D
c. Check and modify the operating point

Draw a new load line with slope - l/(RD + RS) and produce a new region of
allowable operation on the new load line. If V'GS intersects this region, the
design is satisfactory. If not, we pick new values of V"GS that do intersect
the new allowed region of operation and calculate a new value of RS.
Then, the checking procedure is repeated.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits

(4) Limitation
VGS is always negative in this bias circuit, therefore, the self-bias circuit is
only suitable for JFET and depletion MOSFET.
Note: If a P-channel FET is used, the DC supply should be negative in the
Chair Professor Rui-Xiang Yin (South China University of Technology)
circuit.
 Chapter Eleven Small-Signal Model and Circuits
2. Voltage divider biasing circuit 分压偏置电路
(1) Circuit structure

DC equivalent

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
(2) Operating point calculation
Because IG=0, VG=V1. If the static drain current is ID, we have
R2
VGS  VG  VS  VDD  I D RS
R1  R2
Recall the FET characteristic
VGS 2 VGS 2
I D  I DSS (1  ) or I D  I DSS (1  )
VP VT
where, IDSS is the drain current at VGS=0 for JFET and
depletion MOSFET or VGS=2VT for enhancement MOSFET.
Solving above equations we may yield the operating point.

In this biasing circuit, the limitation of VGS<0 is eliminated. Therefore it is

suitable for all type FET circuit.
It is also noted that if a P-channel FET is used, the DC supply should be
negative in the circuit.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits
11.4 Models with Energy Storage

The resistive small-signal device models discussed thus far provide both
simple and accurate representations of device behavior as long as the rate
of variation of the incremental signals is not too fast. At frequencies in the
high audio range and above, the speed of the device can become critical in
determining the actual response to an excitation. For example, the gate of a
MOSFET is actually connected to the channel through a capacitor. This
capacitor must be charged and discharged as the gate-to-source voltage is
changed. The charging and discharging introduce time delays and finite
response times.
If we are to represent accurately the time delays and their effects on signals,
we must allow for the inherent energy-storage and charge-storage features
of device operation. Large-signal models that include these capacitive
effects are called charge-control models, which is out of our course. For
small-signal applications, the capacitive effects can be represented by the
addition of constant, ideal capacitors into the small-signal model.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
11.4.1 The Hybrid-p Model of BJT

hybrid- model

rbb' —— Base ohmic resistance between the base terminal and the active base
region. Its value may vary between a few ohms and about 100 ohms d
epending on the specific transistor and on the operating point.
C ——The capacitance of the reverse-biased collector-base junction. As the coll
ector-base voltage changes, charge must be added or subtracted from t
he space-charge layer at the junction. Therefore, the space-charge layer
itself acts like a capacitance: a change in voltage must be accompanied
by flow of charge. The value of C ranges from about 2 pF in the very b
est high frequency transistors up to 5 or 10 pF in typical signal transisto
rs; it depends somewhat on the value of VCE, static operating point volta
ge between collector and emitter.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
C ——One contribution to C is the emitter-base junction capacitance, space-
charge capacitance, which behaves similar to the collector-base junction
capacitance. The second, and more important contribution to C at mod
erate and large values of IC is from the storage of excess minority carrier
s in the neutral-base region between the two junctions, stored-charge ca
pacitance. The sum of this stored-charge capacitance and the space-char
ge capacitance of the emitter-base junction. The value of C, depends ap
proximately, linearly on the transistor collector current with typical val
ues lying in the range of 10~100 pF.
r—— B-E junction forward-bias resistance, which depends on values of IC a
nd temperature.
gm—— Transconductance, which also depends on values of IC and temperature.
kT 1 q
r   0  ( )  g m  ( ) | I C |
q | IC | kT
kT
where is the potential related to the temperature.
q
At the room temperature (27ºC) it is 25.8mV.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
11.4.2 An FET Incremental Model

hybrid- model

Cgs —— A dielectric-filled capacitor of gate-to-source in the case of a MOSFE

T, or the space-charge-layer capacitance of the back-biased gate-to-so
urce junction in a JFET. The capacitors is small, having magnitudes
on the order of several pF.
Cgd——A dielectric-filled capacitor of gate-to-drain in the case of a MOSFET,
or the space-charge-layer capacitance of the back-biased gate-to-drai
n junction in a JFET. The capacitors is small, having magnitudes on t
he order of several pF.
Chair Professor Rui-Xiang Yin (South China University of Technology)
 Chapter Eleven Small-Signal Model and Circuits
11.4.3 The capacitance affection at high frequencies
We analyze the effect of capacitances in bipolar junction transistor amplifier.

As the frequency is efficient higher, the currents through the capacitors are l
arger and v is smaller. Thus the output signal voltage may be smaller at the s
ame input signal voltage. Then the voltage gain becomes also smaller.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits

In the worst saturation, the frequency is infinite, the capacitors are equivalen
t to short-circuits. In this case, vis dropped to zero and the voltage gain also
becomes zero. The amplifier loses the amplification ability.

Chair Professor Rui-Xiang Yin (South China University of Technology)

 Chapter Eleven Small-Signal Model and Circuits

Exercises of Chapter 11

E11.1, E11.2, E11.4, E11.5, E11.7, E11.8, E11.9, E11.10*

Chair Professor Rui-Xiang Yin (South China University of Technology)