DEPARTMENT OF TECHNICAL EDUCATION

ANDHRA PRADESH
Name : Amarnath Katta
Designation : Lecturer
Branch : Electronics and Communication
Institute : GMR Polytechnic,Paderu,Vizag Dist.
Year/Semester : III-Semester
Subject : DIGITAL ELECTRONICS
Subject code : EC-304
Topic : A/D and D/A converters
Duration : 150 Mts
Sub Topic : Successive Approximation ADC
Teaching Aids : PPT,Block Diagrams,Model graphs
EC304.73 TO 75 1
OBJECTIVES

• On completion of this period ,you would be

able to know

• Successive Approximation ADC

a) Working

b) Advantages

EC304.73 TO 75 2
Recap

• What is A/D conversation ?

• A/D converter using counter method.

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BLOCK DIAGRAM ADC (SAR type)
START
LSB

CONTROL SAR
VR
MSB D0

REGISTER
BUFFER
C D1

VOLTAGE D2
COMPARATOR D3

4 BIT D/A
Va Vo CONVERTER

FIG (1)

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WORKING
• Successive Approximation ADC consists of

1. Voltage comparator
2. SAR
3. D/A Converter
4. Control logic
5. Buffer register

EC304.73 TO 75 5
• VOLTAGE COMPARATOR:
Compares the voltage coming from DAC and analog input
voltage.

• D/A CONVERTER:
Converts digital signal to analog signal.

• SUCCESSIVE APPROXIMATION REGISTER :

SAR is a register where the output is ‘1000’ initially.

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CONTROL LOGIC:

Control logic sets or resets the SAR output depending on

the comparator output.

OUTPUT BUFFER:

Buffer register output provides the actual digital output.

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INITIAL SETTINGS

• Initially the SAR is set to ‘1000’.

VR
• The DAC produces output V0 =
2

• Apply analog voltage as input to the comparator.

EC304.73 TO 75 8
WORKING

• Control logic sets the MSB if the output of the comparator

is positive else it resets the MSB.

• Next lower significant bit is set to 1.

3VR VR
• Now DAC output is or .
4 4
• This process is continued till the LSB is checked

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ILLUSTRATION
XXX

FIG (2)
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• All the n-bits are determined after n cycles of V0 generation
and comparison with Va .

• Buffer register output provides the actual digital output.

• This binary output represents the value of the analog input.

• Thus an n-bit digital output is produced in ‘n’ clock cycles.

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ADVANTAGES

• Speed in operation.

• The conversion time is constant irrespective of analog input

• The number of clock pulses required for conversion is n.

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QUIZ

• The maximum number of clock pulses required

for conversion

a) 2N-1
b) n
c) 2N
d) 22N

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 QUIZ

• Successive Approximation ADC is faster in operation

(TRUE/FALSE)
True

• Successive Approximation ADC requires D/A converter in

its circuit diagram. (TRUE/FALSE)
True

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Frequently asked questions

• Explain Successive Approximation ADC . (12M).

• What are the Advantages of Successive Approximation ADC

(4M)

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 ASSIGNMENT

• Explain Successive Approximation ADC.

• What are the Advantages of Successive Approximation

ADC?

EC-304.73 TO 75 16