02 Gates Notes

Flowcharts
Like other types of diagrams, they help visualize

what is going on and thereby help understand a
process, and perhaps also find less-obvious
features within the process, like flaws and
bottlenecks.
Flowcharts
There are different types of flowcharts: each type

has its own set of boxes and notations. The two
most common types of boxes in a flowchart are:
● a processing step, usually called activity,
and denoted as a rectangular box.
● a decision, usually denoted as a diamond.
Pseudocode
Pseudocode is a detailed yet readable description of

what a computer program or algorithm must do,
expressed in a formally-styled natural language rather
than in a programming language. Pseudocode is
sometimes used as a detailed step in the process of
developing a program.
https://codetoflow.com/
A switch
• Acts as a conductor or
insulator
• Can be used to build

amazing things…
The Bombe used to break the German

Enigma machine during World War II
Basic Building Blocks: Switches to Logic Gates
+
Truth Table
A A B Ligh
-
t
OF
OF OF
OF
B F
F
OF
F
F
ON
OF ON
F
F
ON OF
ON OF
F
F
ON ON
+
Truth Table
A A B Ligh
-
t
OF
OF OF
OF OFF
B F
F
OF
F
F
ON ON
OF ON
F
F
ON OF ON
ON OF
F
F
ON
ON ON
+ A - A B Ligh
t
OF OF
F F
B
OF ON
F
+ • Either (OR)
Truth Table
A A B Ligh
-
t
OF OF OFF
B F
OF
F
ON ON
F
ON OF ON
F
• Both (AND)
ON ON ON
+ A - A B Ligh
t
OF OF OFF
F F
B OF ON OFF
F
ON OF OFF
• Either (OR)
Truth Table
A A B Ligh
-
t
OR OF OF OFF
B F
OF
F
ON ON
F
ON OF ON
F
• Both (AND)
ON ON ON
A - A B Ligh
t
AND OF
F
OF
F
OFF
B OF ON OFF
F
ON OF OFF
• Either (OR)
Truth Table
A A B Ligh
-
t
0 = OFF
OR 0 0 0 1 = ON
B 0 1 1
1 0 1
1 1 1
• Both (AND)
A - A B Ligh
t
AND 0 0 0
0 1 0
B
1 0 0
1 1 1
OR
B
George Boole,(1815-1864)
A • Did you know?

• George Boole Inventor of the idea of
AND logic gates. He was born in Lincoln,
B England and he was the son of a
shoemaker in a low class family.
Takeaway
• Binary (two symbols: true and false) is the basis
of Logic Design
Building Functions: Logic Gates
• NOT: A Out
A
• AND: A B Out
A 0 0 0
0 1 0
B
1 0 0
• OR: 1 1 1
A B Out
A
0 0 0
B 0 1 1
1 0 1
1 1 1
• Logic Gates
 digital circuit that either allows a signal to pass through it or not.
 Used to build logic functions
 There are seven basic logic gates:
AND, OR, NOT
• NOT: A Out
A
0 1
1 0
• AND: A B Out
A 0 0 0
0 1 0
B
1 0 0
• OR: 1 1 1
A B Out
A
0 0 0
B 0 1 1
1 0 1
1 1 1
• Logic Gates
AND, OR, NOT,
• NOT: A Out
A
0 1
1 0
• AND: A B Out A B Out
A 0 0 0
NAND: A
0 0
0 1
1
1
0 1 0
B B 1 0 1
1 0 0
• OR: 1 1 1 1 1 0
A B Out NOR: A B Out

A A
0 0 0 0 0 1
B 0 1 1 B 0 1 0
1 0 1 1 0 0
1 1 1 1 1 0
• Logic Gates
AND, OR, NOT,
Which Gate is this? iClicker Question
Function:
Symbol:
a b Out
Truth Table:
a
(A) NOT
b
(B) OR Out
(C) XOR
(D) AND
(E) NAND
• XOR: out = 1 if a or b is 1, but not both;
• out = 0 otherwise.
• out = 1, only if a = 1 AND b = 0
• OR a = 0 AND b = 1
a b Out
0 0 0
0 1 1
1 0 1
1 1 0
a
(A) NOT
b
(B) OR Out
(C) XOR
(D) AND
(E) NAND
• XOR: out = 1 if a or b is 1, but not both;
• out = 0 otherwise.
• out = 1, only if a = 1 AND b = 0
• OR a = 0 AND b = 1
a b Out
0 0 0
0 1 1
1 0 1
1 1 0
a
(A) NOT Out
b
(B) OR
(C) XOR
(D) AND
(E) NAND
Activity#2: Logic Gates
• Fill in the truth table, given the following Logic
Circuit made from Logic AND, OR, and NOT gates.
• What does the logic circuit do?
a b d Out
0 0 0
0 0 1
0 1 0 a
0 1 1
1 0 0 Out
d
1 0 1
1 1 0
b
1 1 1
Activity#2: Logic Gates
• Multiplexor: select (d) between two inputs (a and b)
and set one as the output (out)?
• out = a, if d = 0
• out = b, if d = 1
a b d Out
0 0 0 0
0 0 1 0
0 1 0 0 a
0 1 1 1
1 0 0 1 Out
d
1 0 1 0
1 1 0 1
b
1 1 1 1
Pro Tip
• Given a Logic function, create a Logic Circuit that
implements the Logic Function…
• …and, with the minimum number of logic gates
• Fewer gates: A cheaper ($$$) circuit!

Logic Gates
A Out
NOT: A 0 1
1 0
A B Out
0 0 0
AND: A
0 1 0
B
1 0 0
1 1 1
OR: A
A B Out
0 0 0
B 0 1 1
1 0 1
XOR: 1 1 1
A B Out
A 0 0 0
0 1 1
B
1 0 1
1 1 0
Logic Gates
A Out
NOT: A 0 1
1 0
A B Out A B Out
AND: A 0 0 0
NAND: A
0 0
0 1
1
1
0 1 0
B B 1 0 1
1 0 0
1 1 1 1 1 0
NOR:
OR: A
A B Out
0 0 0
A
A B Out
0 0 1
B 0 1 1 B 0 1 0
1 0 1 1 0 0
1 1 0
XOR: 1 1 1
XNOR:
A B Out A B Out
A 0 0 0 A 0 0 1
0 1 1 0 1 0
B B
1 0 1 1 0 0
1 1 0 1 1 1
Logic Implementation
• How to implement a desired logic function?
a b c out
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 0
a b c out minterm 1) Write minterms
0 0 0 0 a b c 2) sum of products:
0 0 1 1 a b c • OR of all minterms where out=1
0 1 0 0 abc
0 1 1 1 abc
1 0 0 0 abc
1 0 1 1 abc
1 1 0 0 abc
1 1 1 0 abc
a b c out minterm 1) Write minterms
0 0 0 0 a b c 2) sum of products:
0 0 1 1 a b c • OR of all minterms where out=1
0 1 0 0 abc • E.g. out = c + bc + ac
0 1 1 1 abc a
b
1 0 0 0 abc c
out
1 0 1 1 abc
1 1 0 0 abc
1 1 1 0 abc
corollary: any combinational circuit can be implemented in
two levels of logic (ignoring inverters)
• NOT:
Logic Equations
 out = ā = !a = a
• AND:
 out = a ∙ b = a & b = a  b
• OR:
 out = a + b = a | b = a  b
• XOR:
 out = a  b = a + āb
• Logic Equations
 Constants: true = 1, false = 0
 Variables: a, b, out, …
 Operators (above): AND, OR, NOT, etc.
• NOT:
Logic Equations
 out = ā = !a = a
• AND: NAND:
 out = a ∙ b = a & b = a  b
• out = = !(a & b) =  (a  b)
• OR:
 out = a + b = a | b = a  b NOR:
• out = = !(a | b) =  (a  b)
• XOR:
 out = a  b = a + āb XNOR:
• out = = ab +
• Logic Equations
 Constants: true = 1, false = 0
 Variables: a, b, out, …
 Operators (above): AND, OR, NOT, etc.
Identities
Identities useful for manipulating logic equations
– For optimization & ease of implementation
a+0=
a+1=
a+ā=
a∙0 =
a∙1 =
a∙ā =
Identities
a+0= a a
a+1= 1
a+ā= 1
b
a∙0 = 0
a∙1 = a
a
a∙ā = 0
b
Identities
a+ab =
a(b+c) =
=
Identities
A A
= ∙ B
↔ B
A A
= + B
↔ B
a+ab =a
a(b+c) = ab + ac
= +∙
Minimization Example
a+0=a
Minimize this logic equation:
a+1=1
a+ā=1
a·0 =0 (a+b)(a+c) = (a+b)a + (a+b)c
a·1 =a = aa + ba + ac + bc
a·ā =0 = a + a(b+c) + bc
a+ab =a = a + bc
a (b+c) = ab + ac
39
a+0=a
(a+b)(a+c)  a + bc
a+1=1
a+ā=1
a·0 =0 How many gates were
a·1 =a required before and after?
a·ā =0
a+ab =a BEFORE AFTER

a (b+c) = ab + ac (A) 2 OR 1 OR
(B) 2 OR, 1 AND 2 OR
(C) 2 OR, 1 AND 1 OR, 1 AND
(D) 2 OR, 2 AND 2 OR
(E) 2 OR, 2 AND 2 OR, 1 AND
40
a+0=a
(a+b)(a+c)  a + bc
a+1=1
a+ā=1
a·0 =0 How many gates were
a·1 =a required before and after?
a·ā =0
a+ab =a BEFORE AFTER

a (b+c) = ab + ac (A) 2 OR 1 OR
(B) 2 OR, 1 AND 2 OR
(C) 2 OR, 1 AND 1 OR, 1 AND
(D) 2 OR, 2 AND 2 OR
(E) 2 OR, 2 AND 2 OR, 1 AND
41
Checking Equality w/Truth Tables
circuits ↔ truth tables ↔ equations
Example: (a+b)(a+c) = a + bc
a b c
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Checking Equality w/Truth Tables
circuits ↔ truth tables ↔ equations
Example: (a+b)(a+c) = a + bc
a b c a+b a+c LHS bc RHS
0 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0
0 1 0 1 0 0 0 0
0 1 1 1 1 1 1 1
1 0 0 1 1 1 0 1
1 0 1 1 1 1 0 1
1 1 0 1 1 1 0 1
1 1 1 1 1 1 1 1
Takeaway
• Binary (two symbols: true and false) is the basis
of Logic Design
• More than one Logic Circuit can implement same

Logic function. Use Algebra (Identities) or Truth
Tables to show equivalence.
Karnaugh Maps
How does one find the most efficient equation?
– Manipulate algebraically until…?
– Use Karnaugh Maps (optimize visually)
– Use a software optimizer
For large circuits

– Decomposition & reuse of building blocks
Minimization with Karnaugh maps (1)
Sum of minterms yields

 out = c + bc + a + ac
a b c out
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0

 out = c + bc + a + ac
a b c out
0 0 0 0
0 0 1 1
0 1 0 0 Karnaugh maps identify
0 1 1 1 which inputs are (ir)relevant
1 0 0 1
1 0 1 1
to the output
1 1 0 0
1 1 1 0
ab
c 00 01 11 10
0 0 0 0 1
1 1 1 0 1

 out = c + bc + a + ac
a b c out
0 0 0 0
0 0 1 1
0 1 0 0 Karnaugh maps identify
0 1 1 1 which inputs are (ir)relevant
1 0 0 1
1 0 1 1
to the output
1 1 0 0
1 1 1 0
ab
c 00 01 11 10
0 0 0 0 1
1 1 1 0 1

 out = c + bc + a + ac
a b c out
0 0 0 0
0 0 1 1
0 1 0 0 Karnaugh map minimization
0 1 1 1  Cover all 1’s
1 0 0 1
1 0 1 1  Group adjacent blocks of 2n
1 1 0 0 1’s that yield a rectangular
1 1 1 0
shape
ab
c 00 01 11 10  Encode the common features
0
of the rectangle
0 0 0 1
 out = a + c
1 1 1 0 1
Karnaugh Minimization Tricks (1)
ab
c 00 01 11 10
Minterms can overlap
0 0 1 1 1  out = b + a + ab
1 0 0 1 0
ab
c 00 01 11 10
0 1 1 1 1 Minterms can span 2, 4, 8
1 0 0 1 0
or more cells
 out = + ab
ab
c 00 01 11 10
Minterms can overlap
0 0 1 1 1  out = b + a + ab
1 0 0 1 0
ab
c 00 01 11 10
0 1 1 1 1 Minterms can span 2, 4, 8
1 0 0 1 0
or more cells
 out = + ab
ab
cd 00 01 11 10
00 0 0 0 0 • The map wraps around
01 out = d
1 0 0 1 
11 1 0 0 1
10
0 0 0 0
ab
cd 00 01 11 10
00 1 0 0 1  out =
01
0 0 0 0
11 0 0 0 0
10
1 0 0 1
ab
cd 00 01 11 10
00 0 0 0 0 • The map wraps around
01 1 0 0 1  out = d
11 1 0 0 1
10
0 0 0 0
ab
cd 00 01 11 10
00 1 0 0 1  out =
01 0 0 0 0
11 0 0 0 0
10
1 0 0 1
ab
cd 00 01 11 10
00 0 0 0 0 • “Don’t care” values can be
01 1 x x x interpreted individually in
11 1 x x 1 whatever way is convenient
10
0 0 0 0  assume all x’s = 1
 out = d
ab
cd 00 01 11 10
00 1 0 0 x  assume middle x’s = 0
01 0 x x 0  assume 4th column x = 1
11 0 x x 0
 out =
10
1 0 0 1
ab
cd 00 01 11 10
00 0 0 0 0 • “Don’t care” values can be
01 1 x x x interpreted individually in
11 1 x x 1 whatever way is convenient
10
0 0 0 0  assume all x’s = 1
 out = d
ab
cd 00 01 11 10
00 1 0 0 x  assume middle x’s = 0
01 0 x x 0  assume 4th column x = 1
11 0 x x 0
 out =
10
1 0 0 1
Minimization with K-Maps
ab
c 00 01 11 10 (1) Circle the 1’s (see below)
0 0 0 0 1 (2) Each circle is a logical
component of the final equation
1 1 1 0 1
=a+c
Rules:
• Use fewest circles necessary to cover all 1’s
• Circles must cover only 1’s
• Circles span rectangles of size power of 2 (1, 2, 4, 8…)
• Circles should be as large as possible (all circles of 1?)
• Circles may wrap around edges of K-Map
• 1 may be circled multiple times if that means fewer circles
56
Multiplexer
• A multiplexer selects
a between multiple inputs
b  out = a, if d = 0
d
 out = b, if d = 1
a b
0 0
d
0
out
• Build truth table
0 0 1 • Minimize diagram
0 1
0 1
0
1
• Derive logic diagram
1 0 0
1 0 1
1 1 0
1 1 1
Multiplexer Implementation
b
• Build a truth table
out = bd + a + ab + abd
d
a b d out
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 1
b
• Build the Karnaugh
d
map
ab
d 00 01 11 10
a b d out
0
0 0 0 0
0 0 1 0 1
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 1
b
• Build the Karnaugh
d
map
ab
d 00 01 11 10
a b d out
0 0 0 1 1
0 0 0 0
0 0 1 0 1 0 1 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 1
b
• Derive Minimal
d
Logic Equation
ab
d 00 01 11 10
a b d out
0 0 0 1 1
0 0 0 0
0 0 1 0 1 0 1 1 0
0 1 0 0
0 1 1 1 • out = a + bd
1 0 0 1 a
1 0 1 0
1 1 0 1 d out
1 1 1 1
b
Transistors 101
Source Gate Drain Source Gate Drain
—
Insulator Insulator
- + + + + + + + + - - + + + + -
+ + channel created
+ + P-type
- + + + - - - + + + - - + + -
+- + - + ++ -
P-type - P-type P-type - P-type
- N-type - - N-type -
- - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - -
P-Transistor Off P-Transistor On

N-Type Silicon: negative free-carriers (electrons)
P-Type Silicon: positive free-carriers (holes)
P-Transistor: negative charge on gate generates electric field that
creates a (+ charged) p-channel connecting source & drain
N-Transistor: works the opposite way
Metal-Oxide Semiconductor (Gate-Insulator-Silicon)
• Complementary MOS = CMOS technology uses both p- & n-type
transistors 62
CMOS Notation
N-type Off/Open On/Closed
0 1
gate
P-type
Off/Open On/Closed
1 0
gate
Gate input controls whether current can flow

between the other two terminals or not.
Hint: the “o” bubble of the p-type tells you that

this gate wants a 0 to be turned on
63
Which of the following statements is false?
(A) P- and N-type transistors are both used in CMOS

designs.
(B) As transistors get smaller, the frequency of your
processor will keep getting faster.
(C) As transistors get smaller, you can fit more and
more of them on a single chip.
(D) Pure silicon is a semi conductor.
(E) Experts believe that Moore’s Law will soon end.
64
2-Transistor Combination: NOT
• Logic gates are constructed by combining transistors
in complementary arrangements
• Combine p&n transistors to make a NOT gate:
CMOS Inverter :
power source (1) power source (1) power source (1)
p-gate — p-gate + p-gate

closes stays open
0 1 1 0
input output
n-gate
n-gate n-gate
— + closes
stays open
ground (0) ground (0) ground (0)
65
Inverter
Vsupply (aka logic 1) Function: NOT
Symbol:
in out
in out
Truth Table:
(ground is logic 0)
In Ou
t
0 1
1 0
66
NOR Gate
Vsupply Function: NOR
A Symbol:
B a
out
b
out
A B Truth Table:
A B ou
t
0 0 1
0 1 0
1 0 0 67
Which Gate is this? Function:
Vsupply Vsupply
Symbol:
A B
out
B Truth Table:
A A B ou
t
(A) NOT
0 0
(B) OR
(C) XOR 0 1
(D) AND
(E) NAND
1 0
68
Which Gate is this? Function:
Vsupply Vsupply
Symbol:
A B
out
B Truth Table:
A A B ou
t
(A) NOT
0 0 1
(B) OR
(C) XOR 0 1 1
(D) AND
(E) NAND
1 0 1
69
Building Functions (Revisited)
• NOT:
• AND:
• OR:
• NAND and NOR are universal

 Can implement any function with NAND or just NOR gates
 useful for manufacturing
•
Building
NOT:
Functions (Revisited)
a
a
• AND:
b
• OR: a
b
• NAND and NOR are universal

 Can implement any function with NAND or just NOR gates
 useful for manufacturing
Logic Gates
• One can buy gates
separately
 ex. 74xxx series of
integrated circuits
 cost ~$1 per chip, mostly
for packaging and testing
• Cumbersome, but possible

to build devices using
gates put together
manually
Then and Now
https://www.computershopper.com/computex-2015/performance-preview-desktop-broadwell-at-computex-2015
• The first transistor • Intel Broadwell

• One workbench at AT&T Bell • 7.2 billion transistors, 14nm
Labs • 456 square millimeters
• 1947 • Up to 22 processing cores
• Bardeen, Brattain, and Shockley
74
https://en.wikipedia.org/wiki/Transistor_count
Big Picture: Abstraction
• Hide complexity through simple abstractions
 Simplicity
• Box diagram represents inputs and outputs
 Complexity
• Hides underlying NMOS- and PMOS-transistors and atomic
interactions
Vdd a
in out d out
Vss b
a
d out
in out 75
b

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02 Gates Notes

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Flowcharts

Like other types of diagrams, they help visualize

There are different types of flowcharts: each type

Pseudocode is a detailed yet readable description of

• Can be used to build

The Bombe used to break the German

A • Did you know?

• AND: A B Out A B Out

A B Out NOR: A B Out

• Fewer gates: A cheaper ($$$) circuit!

a+ab =a BEFORE AFTER

a+ab =a BEFORE AFTER

• More than one Logic Circuit can implement same

For large circuits

Sum of minterms yields

Sum of minterms yields

Sum of minterms yields

Sum of minterms yields

P-Transistor Off P-Transistor On

Gate input controls whether current can flow

Hint: the “o” bubble of the p-type tells you that

(A) P- and N-type transistors are both used in CMOS

p-gate — p-gate + p-gate

ground (0) ground (0) ground (0)

• NAND and NOR are universal

• NAND and NOR are universal

• Cumbersome, but possible

• The first transistor • Intel Broadwell

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