BITS Pilani

Sindhu S
BITS Pilani Dept of Physics, BITS Pilani, Pilani Campus
Dept of EEE, WILP Division, Bangalore
Pilani Campus
MELZG 611
IC Fabrication Technology
Lecture No.1
Date . 13/01/2024
Contact List of Topic Title Topic # References
Hour (from content structure in Part A) (from content structure in (Chap/Sec)(Text
Part A) Book)
1 History and Development Crystal Structure and basics , T1 , R1
Crystal structure and basics .Concepts of Crystal Clean room
structure, Miller indices, orientation, defects. .
Introduction to clean room, Clean room basics,
Clean room attire, Standards of cleanrooms

2 Crystallography and crystal structure of Silicon, Crystal Growth and wafer T1

Crystal growth techniques preparation

Czochralski and FZ growth methods,

Wafer preparation and specifications, SOI wafer
manufacturing

3-4 Photolithography, Light sources, Wafer exposure Lithography processing 3.5

systems, Photoresists, Baking and development,
Mask making, Measurement of mask features
and defects, resist patterns and etched features

5-6 Chemical and physical vapour Thin film deposition and T2

deposition,epitaxial growth, manufacturing epitaxy
methods and systems, deposition of dielectrics
and metals commonly used in VLSI,Epitaxial
process of Silicon wafers,Molecular Beam
 7 Types of oxidation, Thermal Oxidation, D-G Oxidation T3
model, dopant distribution in oxide layer,
growth of oxide layer. Wet and Dry oxidation,
growth kinetics and models, defects,
measurement methods and characterization.

8 Models for diffused layers, Characterization Diffusion T7

methods, Segregation, Interfacial dopant pileup,
oxidation enhanced diffusion, dopant-defect
interaction. (4 lectures)

9 Basic concepts, High energy and ultralow energy Ion Implantation T7

implantation, shallow junction formation &
modeling, Electronic stopping, Damage
production and annealing, RTA Process & dopant
activation. Channeling

10 Different types of etching, dry etching, wet Etching T5

etching, plasma etching, etching of materials
using vlsi, modelling of etching
11 Aluminium metallization, Copper metallization, Metallization T8
contacts, interconnects, multilevel interconnects

12 Chemical Mechanical Planarization process, Planarization T8

electrochemical mechanical planarization
13 Yield and reliability, bath tub curve yield T12
14-15 Assembly and packing Assembly and packing T13
 • Unlike other goods cost of electronic goods comes down and efficiency increases. Why?
• Because of the advancement in the technology in making chips
• Production cost decreases

5
INTRODUCTION
It is not sufficient any longer to think a silicon oxidation simply a chetmical reaction between
silicon and oxygen that grows SiO2.
Today we must understand that detailed bonding between silicon and oxygen atoms and
kinetics that drive this reaction on atomic basis.
•10 µm – 1971
•6 µm – 1974
•3 µm – 1977
•1.5 µm – 1982
•1 µm – 1985
•800 nm – 1989
•600 nm – 1994
•350 nm – 1995
•250 nm – 1997
•180 nm – 1999
•130 nm – 2001
•90 nm – 2004
•65 nm – 2006
•45 nm – 2008
•32 nm – 2010
•22 nm – 2012
•14 nm – 2014
•10 nm – 2016–2017
•7 nm – 2018–2019
•5 nm – 2020–2021
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IC Fabrication Technology: Brief History
 1940s - setting the stage - the initial inventions that made integrated circuits
possible.

 In 1945, Bell Labs established a group to develop a semiconductor replacement for

the vacuum tube. The group led by William Shockley, included, John Bardeen,
Walter Brattain and others.

 In 1947 Bardeen and Brattain and Shockley succeeded in creating an amplifying

circuit utilizing a point-contact "transfer resistance" device that later became known
as a transistor.

 In 1951 Shockley developed the junction transistor, a more practical form of the
transistor.

 By 1954 the transistor was an essential component of the telephone system and the
transistor first appeared in hearing aids followed by radios.
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The transistor invented at Bell lab.in 1947

In 1956 the importance of the invention of the transistor by Bardeen, Brattain and Shockley was
recognized by the Nobel Prize in physics.
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1958 - Integrated circuit invented

September 12th 1958 Jack Kilby at
Texas instrument had built a simple
oscillator IC with five integrated
components (resistors, capacitors,
distributed capacitors and transistors)

In 2000 the importance of the IC was

recognized when Kilby shared the
Nobel prize in physics with two
others. Kilby was cited by the Nobel
committee "for his part in the
invention of the integrated circuit

a simple oscillator IC
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1959 - Planar technology invented

 Kilby's invention had a serious drawback, the individual

circuit elements were connected together with gold
wires making the circuit difficult to scale up to any
complexity.

 By late 1958 Jean Hoerni at Fairchild had developed a

structure with N and P junctions formed in silicon. Over
the junctions a thin layer of silicon dioxide was used as
an insulator and holes were etched open in the silicon
dioxide to connect to the junctions.

 In 1959, Robert Noyce also of Fairchild had the idea to

evaporate a thin metal layer over the circuits created by
Hoerni's process.

 The metal layer connected down to the junctions

through the holes in the silicon dioxide and was then
etched into a pattern to interconnect the circuit. Planar Planar technology
technology set the stage for complex integrated circuits
and is the process used today.

Lecture #1
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1963 - CMOS invented
 Frank Wanlass at Fairchild Semiconductor originated and published the
idea of complementary-MOS (CMOS).

 It occurred to Wanlass that a complementary circuit of NMOS and

PMOS would draw very little current. Initially Wanlass tried to make a
monolithic solution, but eventually he was forced to prove the concept
with discrete devices.

 Enhancement mode NMOS transistors were not yet available and so

Wanlass was used a depletion mode device biased to the off-state.
 Amazingly CMOS shrank standby power by six orders of magnitude over
equivalent bipolar or PMOS logic gates.

 On June 18, 1963 Wanlass applied for a patent. On December 5th 1967
Wanlass was issued U.S. Patent # 3,356,858 for "Low Stand-By Power
Complementary Field Effect Circuitry".

 CMOS forms the basis of the vast majority of all high density ICs
manufactured today.

Lecture #1
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1965 - Moore's law

 In 1965 Gordon Moore, director of
research and development at Fairchild
Semiconductor wrote a paper for
Electronics entitled "Cramming more
components onto integrated circuits".

 In the paper Moore observed that "The

complexity for minimum component
cost has increased at a rate of roughly a
factor of two per year". This
observation became known as Moore's
law, the number of components per IC
double every year.

 Moore's law was later amended to, the

number of components per IC doubles
every 18 months.
 Moore's law hold to this day.

Lecture #1
 8

1971 - Microprocessor invented

 The combination of the Busicom (Japanese calculator
company) and the Intel came together and by 1971 the 4004
the first 4-bit microprocessor was in production. The 4004
processor required roughly 2,300 transistors to implement,
used a silicon gate PMOS process with 10µm linewidths, had a
108KHz clock speed. In 1974 Intel introduced the 8080, the
first commercially successful microprocessor.

1972 - Intel 8008

 The 8008 was the 8 bit successor to the 4004 and was used in
the Mark-8 computer, one of the first home computers.

 The 8008 had 3,500 transistors, a 200kHz clock speed and a

15.2mm2 die size.

Lecture #1
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“Moore’s Law”

The number of transistors that can be

integrated on a single IC grows
exponentially with time.

“Integration complexity doubles every

two years”
Gordon Moore
Fairchild Corporation - 1965
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Visualizing Moore’s Law in Action (1971-2019)

https://www.visualcapitalist.com/visualizing-
moores-law-in-action-1971-2019/
Course Outline
 Introduction to VLSI
 IC process flow
 Crystal growth and silicon wafers
 Lithography
 Oxidation
 Diffusion
 Ion implantation
 Etching
 Planarization and metallization
 Yield and reliability
 Assembly and packaging

 SZE S. M., “VLSI TECHNOLOGY”

 WOLF S. & TAUBER R.N. , “SILICON PROCESSING FOR THE VLSI ERA”
 CAMPBELL S., “THE SCIENCE AND ENGINEERING OF MICROELECTRONICS
FABRICATION”
 MAY & SZE, “FUNDAMENTALS OF SEMICONDUCTOR FABRICATION”
Introduction to VLSI
Very Large Scale Integration.
Packing more devices into smaller areas.
Applications: High performance computing,
Telecommunication, Consumer electronics, MEMS
etc.
Integration of more functions provides:
Compactness : less area/volume..
Less power consumption.
High reliability due to improved on-chip interconnect.
Higher speed due to reduction in interconnection length.
Cost saving.
Some terms to be familiarized..
Technology:
collection and ordering of unit processes for making a useful
product.
Unit process:
basic steps for construction. (Mechanical analogy: forging,
cutting, drilling welding etc.)
Single crystalline
Materials with same orientation of planes throughout the
crystal.
Polycrystalline
Materials with different orientation of planes in same crystal.
 First Transistor

1947
1947

First transistor (germanium), 1947

John Bardeen and Walter Brattain
Bell Laboratories
This is what
U and I C
in an IC
SSI/MSI/VLSI/ULSI
No of transistors per Chip Technology Name

• Less than 100  Small Scale Integration

• 100 -- 10,000  Medium Scale Integration

• 10,000 -- 100,000  Large Scale Integration

• Greater than 100,000  VLSI

• Greater than 100 Million  ULSI

 How do I design a system…???

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 Clean Rooms
 Wafer processing is carried out in special labs called clean rooms
which are often called ‘Fabs’.
 Motivation for clean rooms is dust particles which can settle on
wafers and cause defects in devices
During wafer processing, or from ambient
Humans emit thousands of particles every minute
 The total number of dust particles per unit volume needs to be
controlled along with temperature and humidity
 High Efficiency Particulate filters in the ceiling
 Perforated floors to allow continuous air flow

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Clean Room Basics
Clean Room
A manmade mini-environment with low particle counts
 Started in medical application for post-surgery infection
prevention
 Particles kills yield
 IC fabrication must in a cleanroom, adopted by
semiconductor industry in 1950
• Smaller device needs higher grade clean room
• Less particle, more expensive to build
What is a Cleanroom?
A clean area, that is designed to reduce the
contamination of processes and materials.
This is accomplished by removing or reducing
contamination sources.
That means clean air, stable temperature, stable
humidity, clean water, gases and chemicals, lighting,
processing- equipment, inspection and test equipment,
room infrastructure, etc.
Particles
• People ~75% • Environment
• Ventilation ~15% • Equipment
• Room Structure • Chemicals
~5% • Process Primary
• Equipment ~5% Sources
• Exposed Skin/Hair / • Gloves
• Tools
People
• Non-cleanroom • Work Surfaces
Paper • Floor
• Garments
Particles

Example
Examples
• Particles as small as 1 micro-meter (micron) =>
0,0000001m
• The unaided eye can see particles as small as 50 microns
on a good background
• The thickness of a human hair is 100 microns
• Time to fall 1 meter in still air for a 10 micron particle is
33 seconds, for a 1 micron particle is 48 minutes
• Humans generate >1x105 particles per minute when
motionless (fully gowned)
• Humans can generate >1x106 particles when walking in
the Cleanroom
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 Cleanroom Standards

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 The manufacturing environment is critical for product
quality. Factors to be considered include:
• Light
• Temperature
• Relative humidity
• Air movement
• Particulate contamination

Uncontrolled environment can lead to poor product quality

=> loss of product and profit

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 Parameters influencing the Cleanroom class
: • Number of particles in the air or on surfaces
• Number of air-changes for each room
• Air velocity and airflow pattern
• Filters (type, position)
• Air pressure differentials between rooms
• Temperature, relative humidity
• Facility Layout and Work-Flow Part of the
Solution: Air-Filtration-Systems, Air-
Conditioning-Systems

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 Air Handling Concepts & Devices

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 Clean room attire, https://youtu.be/UgPW928TNdo

 Entire body is covered with special suit to prevent particle contamination from
human body
 Eye goggles, hand-gloves, and special boots to protect body from chemicals and
for preventing contamination
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 Cleanroom