DIGITAL ELECTRONICS

LECTURE SIX
COMBINATIONAL CIRCUIT

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 Combinational Circuits
• A combinational circuit consists of logic gates whose
outputs, at any time, are determined by combining
the values of the inputs.
• For n input variables, there are 2n possible binary
input combinations.
• For each binary combination of the input variables,
there is one possible output.

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Combinational Circuits (cont.)
• Hence, a combinational circuit can be described by:
1. A truth table that lists the output values for each
combination of the input variables, or
2. m Boolean functions, one for each output variable.

n-inputs Combinational m-outputs

•• ••
• Circuit •

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 Combinational vs. Sequential Circuits
 Combinational circuits are memory-less. Thus, the output
value depends ONLY on the current input values.

 Sequential circuits consist of combinational logic as well as

memory elements (used to store certain circuit states).
Outputs depend on BOTH current input values and previous
input values (kept in the storage elements).

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 Combinational vs. Sequential Circuits

n-inputs Combinational m-outputs

Circuit (Depend only on inputs)
Combinational Circuit

n-inputs m-outputs
Combinational
Circuit Storage
Next Elements Present
state state

Sequential Circuit

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Important Design Concepts
• Modern digital design deals with various methods and
tools that are used to design and verify complex
circuits and systems.
• Concepts:
• Design Hierarchy
• Computer-Aided-Design (CAD) tools
• Hardware Description Languages (HDLs)

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Design Hierarchy
• “Divide-and-Conquer” approach used to cope with the
challenges of designing complex circuits and systems
(many times in the order of millions of gates).
• Circuit is broken into blocks, repetitively.

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 Design Hierarchy
input odd function (for counting # of 1 in inputs)

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Why is Hierarchy useful?
• Reduces the complexity required to design and represent the overall
schematic of the circuit.
• Reuse of blocks is possible. Identical blocks can be used in various
places in a design, or in different designs.

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 Reusable Functions and CAD
• Whenever possible, we try to decompose a complex design into
common, reusable function blocks
• These blocks are
• verified and well-documented
• placed in libraries for future use

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 Integrated Circuits
• Integrated circuit (a chip) is a semiconductor crystal (most often
silicon) containing the electronic components for the digital
gates and storage elements which are interconnected on the
chip.
• There are two types of ICs these are
i. Fixed function logic
ii. Programmable logic

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 Fixed function logic
• In fixed-function logic, the logic function are set by the
manufacturer and cannot be altered.
• Classification of fixed function ics.
i. Small Scale Integration (Ssi): Describes Fixed-function Ics that have up to
ten Equivalent Gate Circuits On A Single Chip And They Include Basic
Gates And Flip Flops.
ii. Medium- Scale Integration (Msi): Describes Ics That Have From 10 To 100
Equivalent Gates On A Chip. They Include Logic Functions Such As
Encoder, Decoder, Registers And Multiplexers, Arithmetic Circuit,small
Memories Etc.
iii. Large-scale Integration (Lsi): There Is A Classification Of Ics With
Complexities Of From More Than 100 To 10,000 Equivalent Gates Per Chip
Including Memories.
iv. Very Large Scale Integration (Vlsi): This Describes Ics, With More
Complexities Of From More Than 10,000 To 100,000 Per Chip.
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 Integrated Circuit Technologies
• There are two types of Transistors with which all integrated
circuits are implemented. These are
i. MOSFET ( Metal Oxide Semi-conductor Field Effect
Transistor) – A Circuit Technology That Uses Mosfet Is CMOS
(Complementary Metal-oxide Semi-conductor)
ii. Bipolar Junction Transistor – A Type Of Fixed Function Digital
Circuit Technology That Uses Bipolar Junction Transistor Is TTL
(TTL Stands For- Transistor-transistor Logic)

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Programmable logic
• Requires both HARDWARE and SOFTWARE.
• Programmable devices can be program to perform a specify logic
function by the manufacturer or by the user.
• Advantages of programmable logic over fixed function ICs.
i. The devices use much less board space for an equivalent amount of
logic.
ii. Designs can be readily change without rewiring or replacing
components.

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Types of programmable devices
• There are two major Categories:
• PLD – Programmable Logic Devices
• FPGA – Field Programmable Gate Array

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 Technology Parameters
• Specific gate implementation technologies are characterized by the following
parameters:
• Fan-in – the number of inputs available on a gate
• Fan-out – the number of standard loads driven by a gate output
• Cost for a gate - a measure of the contribution by the gate to the cost of the
integrated circuit
• Propagation Delay – The time required for a change in the value of a signal to
propagate from an input to an output
• Power Dissipation – the amount of power drawn from the power supply and
consumed by the gate

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 Propagation Delay
• Propagation delay is the time for a change on an input of a gate to propagate to the
output.
• Delay is usually measured at the 50% point with respect to the H and L output
voltage levels.
• High-to-low falling and low-to-high rising delays.

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Average Power Dissipation
• The Average Power Dissipation of Logic Gate is given as

• The speed power product of logic gate is SPP = tpPD

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QUESTION
A certain gate has a propagation delay of 5ns and ICCH 1mA and IccL = 2.5mA with
a DC supply of 5 volt determine the speed power product
SOLUTION:
PD = VCC
=5
=5
= 8.75mW
SPP = tpPD
= 5 x 8.75
= 43.75pJ.
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Chip Design Styles
• Full custom - the entire design of the chip down to the smallest detail of the layout is performed
• Expensive, its timing and power is hard to analyze
• only for dense, fast chips with high sales volume
• Standard cell - blocks have been design ahead of time or as part of previous designs
• Intermediate cost
• Less density and speed compared to full custom
• Gate array - regular patterns of gate transistors that can be used in many designs built into chip - only the
interconnections between gates are specific to a design
• Lowest cost
• Less density compared to full custom and standard cell
• Prototype design
• The base of FPGA

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 Cell Libraries
• Cell - a pre-designed primitive block
• Cell library - a collection of cells available for design using a
particular implementation technology
• Cell characterization - a detailed specification of a cell for
use by a designer

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Cell Library Based Design Procedure
1. Specification
• Write a specification for the circuit if one is not already available
2. Formulation
• Derive a truth table or initial Boolean equations that define the required relationships
between the inputs and outputs, if not in the specification
3. Optimization
• Draw a logic diagram or provide a net list for the resulting circuit using ANDs, ORs, and
inverters

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Cell Library Based Design Procedure
4. Technology Mapping
• Map the logic diagram to the implementation technology selected
• Map to CMOS
5. Evaluation
• Evaluate the timing and power

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 Design Example
1. Specification
• BCD to Excess-3 code converter
• Transforms BCD code for the decimal digits to Excess-3
code for the decimal digits
• BCD code words for digits 0 through 9: 4-bit patterns 0000
to 1001, respectively
• Excess-3 code words for digits 0 through 9: 4-bit patterns
consisting of 3 (binary 0011) added to each BCD code word

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 Design Example (continued)
2. Formulation
• Conversion of 4-bit codes can be most easily formulated by a
truth table
• Variables
- BCD:
A,B,C,D Input BCD Output Excess-3
• Variables ABCD WXYZ
- Excess-3 0000 0011
W,X,Y,Z 0001 0100
• Don’t Cares 0010 0101
- BCD 1010 0011 0110
to 1111 0100 0111
0101 1000
0110 1001
0111 1010
1000 1011
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 Design Example (continued)
z C y C
1 1 1 1
3. Optimization
0 1 3 2 0 1 3 2

1 1 1 1
a. K-maps
4 5 7 6 4 5 7 6

X X X X B X X X X B
12 13 15 14 12 13 15 14

A 1
8 9
X
11
X
10
A 1
8 9
X
11
X
10

W = A + BC + BD D D
X= C+ D+B B CD x C w C
Y = CD + B CD 0
1
1
1
3
1
2 0 1 3 2

Z= D
1
4 5 7 6 4
1
5
1
7
1
6

X X X X B X X X X B
12 13 15 14 12 13 15 14

A 8
1
9
X
11
X
10
A 1
8
1
9
X
11
X
10

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Design Example (continued)
3. Optimization (continued)
Multiple-level using transformations
W = A + BC + BD
X = B C + BD + B CD
Y = CD + CD
Z =D
• Perform extraction, finding factor:
T1 = C + D
W = A + BT1
X = BT1 + B C D
Y = CD + CD
Z= D

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 Design Example (continued)
4. Technology Mapping
Map with a library containing inverters and 2-input NAND, and
then map it to a CMOS based circuit

A
W

B X

C Y
D
Z
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Z
 NAND Mapping Example
A A X
5
B B
6
Y OI
7 2
F 1
C C F
4
3
D D 8 9
E E
(a) (b)

A
B

X
5
C F
6
Y
5 7 D

(c) (d)
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Timing Analysis
• Use static timing analysis which has been covered.

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Transmission Gate Based Design -
Multiplexer
• “Selects” binary information from one of many input lines and directs
it to a single output line.
• Also know as the “selector” circuit,
• Selection is controlled by a particular set of inputs lines whose #
depends on the # of the data input lines.
• For a 2n-to-1 multiplexer, there are 2n data input lines and n selection
lines whose bit combination determines which input is selected.

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 Multiplexer (cont.)

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2-to-1-Line Multiplexer
• Since 2 = 21, n = 1
• The single selection variable S has two values:
• S = 0 selects input I0
• S = 1 selects input I1
• The equation:
Y = S’ I0 + SI1
• The circuit: Enabling
Decoder Circuits

I0
Y
S
I1
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Example: 4-to-1 MUX - Cell Library Based Design

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 4–to–1-Line Multiplexer
using Transmission Gates

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MUX as a Universal Gate
• We can construct AND and NOT gates using 2-to-1
MUXs. Thus, 2-to-1 MUX is a universal gate.

z = 0x + 1x’ = x’ z = x1x0 + 0x0’ = x1x0

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Programmable Logic Array
• The set of functions to be implemented is first transformed to product terms
• Since output inversion is available, terms can implement either a function or its complement

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 Programmable Logic Array Example
• To implement
• F1= A’B’C+A’BC’+AB’C’=(AB+AC+BC+A’B’C’)’
• F2=AB+AC+BC

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 Programmable Logic Array Example
A

X X 1 X X

X X 2 X X
X Fuse intact
Fuse blown
X X 3 X X

X X X 4 X

C C B B A A X 0
X 1

F1

F2

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Summary
• Three design styles
• Full custom design
• Gate library based design
• PLA based design
• Transmission gate based design

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 THANK YOU
QUESTIONS

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