Intel Microprocessor 8086

Intel 8086

• The 8086 is a 16 bit microprocessor chip designed by Intel between early

1976 and June 8, 1978, when it was released.

• HMOS

• 40 pin

• 8086 5MHz, 8086-1 10MHz, 8086-2 8MHz

• 20 bit address, 2 20 bit address.

• = 1048576, one megabyte memory

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Intel 8086

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8086 Clock generator (8284)

• External clock generator needed for clock input

• 8284 divides the external crystal input internally by 3

𝐶𝑙𝑜𝑐𝑘𝐹𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦=

• Suppose we need to operate the 8086 at 15MHz internal clock frequency.

Then we need an external clock generator 8284 to provide the clock input to
the CLK pin of 8086.

• For clock signal generator the X1 and X2 pin of 8284 need to be connected
to a crystal. Determine the frequency of the crystal.

• 45 MHz

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Instruction Queue

• Up to six instruction at a given time

• Speed up in instruction execution

• Supports pipelining

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Memory Segmentation

• Segmentation is the process

in which the main memory of the

computer is logically divided into

different segments and each

segment has its own base address.

• CS, DS, SS, ES

• What are the advantages?

• Note that the 8086 does not work

the whole 1MB memory at any given

time (k4 KB max). 6

Advantages of Segmented Memory

• Powerful memory management mechanism.

• Data related or stack related operations can be performed in different

segments.

• Code related operation can be done in separate code segments.

• It allows to processes to easily share data.

• It allows to extend the address ability of the processor, i.e. segmentation

allows the use of 16 bit registers to give an addressing capability of 1
Megabytes. Without segmentation, it would require 20 bit registers.

• It is possible to enhance the memory size of code data or stack segments

beyond 64 KB by allotting more than one segment for each area.

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Data Access Strategy of 8086

• 8086 access memory with even address

• If the data is in 30024h then, for a 16 bit data 8086 can bring it for operation
using one access (30024h and 30025h together

• On the other hand for off address such as 40005h, it has to bring 40004h +

• 40005h. Again, 40006h + 400007h

• Discard 40004h and 40007h

• Finally, result is in 40005h and 40006h. Two access.

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8086 Architecture

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Logical to Physical Address Calculation

• BIU/EU

• BIU does the address calculation

• Programmer provide the Code segment (16bit) and Instruction pointer

offset(16bit) values

• BIU calculate the 20 bit physical value

• 4 bit Left shift of CS value and add the IP offset values

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Logical to Physical Address Calculation

• Imagine, the content of CS is 1601h. IP contains 1010h. Both are 16 bit

contents.

• BIU is responsible for the physical address calculation. What is the 20 bit
physical address based on current values of CS and IP?

• 17020h

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Addressing Modes of 8086

• Five groups

–Register and Immediate mode

–Memory mode

–I/O mode

–Relative addressing mode

–Implied addressing mode

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Addressing Modes of 8086

Register and Immediate Addressing Mode

• Register Addressing Mode

MOV DX, CX

MOV AL,DL

• Immediate Addressing Mode

MOV CL, 03H

OR

VALUE EQU 03H

MOV CL,VALUE

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Addressing Modes of 8086

• Direct Addressing Mode

MOV CX, DS:START

START=0040h, [DS]=3050h, What are addresses from which data will be transferred in CX?

30540h to CL, 30541h to CH

• Register Indirect Addressing Mode

MOV [DI],BX

[DS]=5004h, [DI]=0020h, [BX]=3456h

Then, after the execution of above instruction, what will happen?

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Addressing Modes of 8086

• Based Addressing Modes

(Uses DS, SS, BX, BP)

MOV AL, START [BX]

MOV AL, [BX+START]

• Indexed Addressing Mode

MOV BH, ARRAY[SI]

• Based Indexed Addressing Mode

MOV ALPHA[SI][BX]

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8086 Pins

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8086 Pins

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8086 Pins

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8086 Pins

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8086 Pins

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Minimum Mode Pins

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Minimum Mode Pins

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Maximum Mode Pins

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Maximum Mode Pins

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Maximum Mode Pins

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Address Latch Enable (ALE)

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8086 Interrupt

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Types of Interrupt

• Hardwired Interrupt/Software Interrupt

• Vectored Interrupt/Non vectored Interrupt

• Maskable Interrupt/Non maskable Interrupt

Software Interrupt

• 0-4 = Predefined Interrupts

• 5-31 Reserved by Intel for future use

• 32-255 Maskable interrupt

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Predefined Interrupts

• TYPE 0 interrupt represents division by zero situation.

• TYPE 1 interrupt represents single step execution during the debugging of a

program.

• TYPE 2 interrupt represents non maskable NMI interrupt.

• TYPE 3 interrupt represents break point interrupt.

• TYPE 4 interrupt represents overflow interrupt.

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CS and IP Calculation

• INT nn

• Address for IP = 4 * nn

• Address for CS ==(4 * nn ) + 2

• Remember nn should be in decimal

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CS and IP Calculation

• A user calls INT 21H, then from which physical address the value will be
loaded to CS and IP?

• If CS and IP will load with the value 40ADh, and 0FD84H, then what will be
the physical address of the ISR?
–21H is 33 in decimal

–IP address 4 33 132 84H

–CS address = (4*33)+2 = 134 = 86H

–84 th and 85 th contains 0FD84H

–86 th and 87 th contains 40ADH

–Thus, 20 bit physical address for ISR is 50854 H

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