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DLC J OBE PresentationGroup-06
DLC J OBE PresentationGroup-06
BANGLADESH
DIGITAL LOGIC AND CIRCUIT
ASSIGNMENT
GROUP: 6
SECTION: J
Group Members
NAME ID
NIYAZ, SABBIR HOSSAIN 22-47538-2
HASAN, TWAKI 22-47559-2
ADOR, MD. MAHADI AFROJ 22-48015-2
ALAM, MD.MASKURUL 22-48273-2
Q-(i): Designing of the digital system for alarm circuit:
Conditions:
Given that, when more than 2 person cross the limit or line, the alarm
goes off. In this case, we will consider the output as 0. On the other
hand less than 2 input line will be considered as 1. When more than 2
inputs are 1 or active at a same time, the alarm will turn on and give
output 1.
Q-(i):Continues
Truth Table: k-map: Implementation of the system with CMOS logic:
A B C D Y 00 01 11 10
CD
0 0 0 0 0 AB
0 0 0 1 0
00 0 0 0 0
0 0 1 0 0 BCD
01 0 0 1 0
0 0 1 1 0 ABC
11 0 1 1 1
0 1 0 0 0
10 0 0 1 0
0 1 0 1 0
ABD ACD
0 1 1 0 0
0 1 1 1 1 Simplified SOP equation:
1 0 0 0 0 ABC + ABD + ACD + BCD
1 0 0 1 0 Circuit Diagram:
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
Here,
A, B, C, and D are considered the 4 people and Y is
the trigger of the alarm circuit.
Q-(ii): Implementing alarm timer circuit:
Answer to the question no (ii)
Here, LOGIC = “48203”
Ω
We know,
Now,
Þ 12.27 Ω