Digital Logic Design

06/05/2024 1
Review
• Define the following:
• Closure, Associative law, Commutative law, Identity element, Inverse and Distributive
• What is the difference between ordinary algebra and Boolean algebra w.r.t.
distributive law
• What is a postulate?
• What is “Duality” and what is its utility?
• What is involution?
• What is operator precedence rule for Boolean algebra?
• How can you convert a Boolean expression in SoP canonical form to PoS canonical
form?
• What are the standard SoP and PoS forms?
• What is the truth table for XOR and XNOR gates
• What are the digital logic families?
• Define “fan out” and “propagation delay”?

06/05/2024 zaid fahim (zaid_fahim@yahoo.com) GCUF SWL DLD Lecture-03 2

Outline
• Introduction to gate-level minimization
• The map method
• Four variable K-Map
• PoS simplification
• Don’t care condition
• NAND and NOR implementation
• Other two level implementations
• XOR function
• HDL
06/05/2024 zaid fahim (zaid_fahim@yahoo.com) GCUF SWL DLD Lecture-03 3
Must Reading
• Chapter No. 3: Gate-Level Minimization

06/05/2024 zaid fahim (zaid_fahim@yahoo.com) GCUF SWL DLD Lecture-03 4

Introduction
“Gate-level minimization is the design task of finding an optimal gate-
level implementation of the Boolean functions describing a digital
circuit”

• Manually difficult for several inputs

• Logic synthesis tools can do it very efficiently and quickly, BUT
• Designer must understand underlying mathematical description

“will enable you to execute a manual design of simple circuits, preparing

you for skilled use of modern design tools”
06/05/2024 zaid fahim (zaid_fahim@yahoo.com) GCUF SWL DLD Lecture-03 5
The Map Method
• Truth table is unique, but algebraic expressions can be many
• Rules for simplification of an algebraic expressions are intuitive and not
straight forward
• Karnaugh map or K-map:
• simple, straightforward procedure for minimizing Boolean functions
• Diagram made of square
• Each square represents one (1) min term
• Enables visualize all possible ways of expressing a Boolean algebraic
function
• Can give simplest expression
• Simplest expression?
• Minimum number of terms and with the smallest possible number of
literals in each term
• expression produces a circuit diagram with a minimum number of gates
and the minimum number of inputs to each gate

06/05/2024 zaid fahim (zaid_fahim@yahoo.com) GCUF SWL DLD Lecture-03 6

Karnaugh Map
• Adjacent Squares
• Number of squares = number of combinations
• Each square represents a minterm
• 2 Variables  4 squares
• 3 Variables  8 squares
• 4 Variables  16 squares
• Each two adjacent squares differ in one variable
• Two adjacent minterms can be combined together

Example:F = x y + x y’
= x ( y + y’ )
Note: adjacent squares horizontally and= vertically
x NOT diagonally

06/05/2024 zaid fahim (zaid_fahim@yahoo.com) GCUF SWL DLD Lecture-03 7

Two Variable
• Example
K-Map
x y F Minterm
m0 m1
0 0 0 0 m0 xy
1 0 1 0 m1 xy m2 m3
2 1 0 0 m2 xy
3 1 1 1 m3 xy
y
y x 0 1

0 0 0 xy xy

x 0 1 1 xy xy
06/05/2024 zaid fahim (zaid_fahim@yahoo.com) GCUF SWL DLD Lecture-03 8
 … continued 2

Two Variable
• Example K-Map
x y F Minterm
m0 m1
0 0 0 0 m0 xy
1 0 1 1 m1 xy m2 m3
2 1 0 1 m2 xy
3 1 1 1 m3 xy
y
y x 0 1
F  x yxyxy
0 1 0 xy xy
( x  x) y x ( y  y )
x 1 1 1 xy xy
F  yx
06/05/2024 zaid fahim (zaid_fahim@yahoo.com) GCUF SWL DLD Lecture-03 9