Programmable Logic Devices (PLD)

Contents:
•Programmable Logic Array (PLA)
•Programmable Array Logic (PAL)
•Logic implementation using Programmable Devices
•Complex Programmable Logic Devices
•Field Programmable Gate Arrays
•Applications of CPLDs and FPGAs.
 Programmable Logic Devices (PLD)
• PLD is a general-purpose chip for implementing logic circuitry. Transistors
and wires are already prefabricated on the PLD. Unlike a logic gate, which
has a fixed function, a PLD has an in defined function. Before the PLD can
be used in a circuit it must be programmed.
• An integrated Circuit that can be programmed in a laboratory to perform
complex functions. Most “standards” PLDs consists of an AND array
followed by an OR array, either (or both) of which is programmable. (i.e.,
In PLD it contains a collection of logic circuit elements that can be
customized in different ways).
 Programmable Logic Devices (PLD)

• The purpose of a PLD device is to permit elaborate digital logic

designs to be implemented by the user in a single device.

• Can be erased electrically and reprogrammed with a new design,

making them very well suited for academic and prototyping

• Types of Programmable Logic Devices

i. SPLDs (Simple Programmable Logic Devices)

– PROM (Programmable Read-Only Memory)
– PLA (Programmable Logic Array)
– PAL (Programmable Array Logic)
ii. CPLD (Complex Programmable Logic Device)
iii. FPGA (Field-Programmable Gate Array)
 Comparison Between PROM,PLA and
PAL
PLA PAL
The AND array implements The AND array implements
a limited no of Product a limited no of Product
terms terms
AND array is AND array is
programmable programmable
OR array is programmable OR array is not
programmable
Additional inputs does not Additional inputs does not
require doubling of size require doubling of size

It can implement SOP with It can implement SOP with

any no of terms limited no of terms

Costlier than PAL Cheaper than PLA

Extremely flexible Moderate flexible
Dr. M.Sridhar, Dept. of ECE, Professor, KLEF
 Ex.1: Full Adder using PAL
Truth Table: Circuit Diagram using PAL:
 Ex. w2: Design of Boolean expression using PLA
f1 = x1x2+x1x3’+x1’x2’x3 and f2 = x1x2+x1’x2’x3+x1x3
CPLD- Complex Programmable Logic Device
 Complex Programmable Logic Devices (CPLDs)

• Digital system design requires several PLD’s

• CPLD is a collection of Simple PLD’s on a single IC
• CPLD consists multiple PLD’s interconnected through Programmable
Interconnect Fabric
• I/O Block provides connections to the IC
• Each I/O pin can be programmed to act as input or output
• Each individual PLD contains typically 8-16 Macrocells
• PIF directs the input to the individual Macrocell and similarly sent to
output.
Field Programmable Gate Array (FPGA)
Architecture
 Field Programmable Gate Array (FPGA)

• FPGA is an integrated circuit that contains many (64 to over 10,000)

identical logic cells that can be viewed as standard components.
• Individual cells are interconnected by a matrix of wires and
programmable switches.
• CPLD is preferred for Low to Medium density designs.
• FPGA is preferred for medium to high density designs.
Applications of CPLD and FPGA