BICMOS PROCESSES

BiCMOS technologies can be broadly classified

into three groups. Those are
 Low-cost, medium speed , 5V digital
 High Performance, high cost, 5V digital
 analog/digital ( requires wide range of power
supplies)
Low cost,medium speed , 5V digital BiCMOS process:

Drawbacks: 1. Collector region resistance is high( high

propagation delay)
2. Packing density is low
 High performance , high cost digital
BiCMOS process:

These are of two types

1. Modification of p-well CMOS process

2. Twin well CMOS process

To improve the performance of BiCMOS circuits,

Buried layers are used
 P-well CMOS process:

It is also named as SBC BiCMOS process . Here packing density is low, less
propagation delay.
 Twin well BiCMOS process:

High packing density , less delay

 UNIT-II:
INTEGRATION CONSIDERATIONS
Threshold voltage adjustment for CMOS devices:
Introducing boron causes a positive shift in threshold
voltage for n-channel MOSFET .
Introducing phosphorus causes a negative shift in
threshold voltage for n-channel MOSFET .
THANK YOU