Digital system

• Two types of circuits

• Combinational circuits
• Sequential Circuits
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• Combinational • Sequential
circuits Circuits
• Outputs • Output depends
depends on on present input
present input and past output
only
• Building blocks –
• Building blocks - logic gates, flip-
logic gates flops
• No feed back • Have feedback
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 Combinational Logic
• A combinational circuit consists of input variables, logic
gates, and output variables.
• The behaviour of a combinational circuit is memoryless
i.e. the output depends solely on its most recent input
and is independent of the circuit’s past history.

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 Analysis procedure
• To obtain the output Boolean functions from a logic
diagram, proceed as follows:
1. Label all gate outputs that are a function of input variables with
arbitrary symbols. Determine the Boolean functions for each
gate output.

2. Label the gates that are a function of input variables and

previously labeled gates with other arbitrary symbols. Find the
Boolean functions for these gates.
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 Analysis procedure
3. Repeat the process outlined in step 2 until the outputs of the
circuit are obtained.

4. By repeated substitution of previously defined functions,

obtain the output Boolean functions in terms of input
variables.

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 Example
F2 = AB + AC + BC; T1 = A + B + C; T2 = ABC; T3 = F2’T1;
F1 = T 3 + T 2
F1 = T3 + T2 = F2’T1 + ABC = A’BC’ + A’B’C + AB’C’ + ABC

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 Derive truth table from logic diagram

• We can derive the truth table in Table 4-1 by using the

circuit of Fig.4-2.

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•Design procedure
• Problem is stated
• Identify the input and output variables
• Assign letter symbol to input and
output variable
• Construct the truth table
• Write Boolean expressions
• Write simplified Boolean expressions
• Draw the logic diagram
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•Guidelines preferred for
combinational circuit while
choosing hardware
• Minimum number of gates with
minimum number of inputs
• Minimum number of
interconnections
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Half Adder:
oThe most basic Arithmetic addition is
two bit addition
oA combinational circuit that performs
the arithmetic addition of two bits is ca
lled a half-adder.
 Half-adder truth table and implementation

S = A`B+AB` = A⊕B C = AB
o To implement half adder using NAND gates; we require 5 NAND
gates.

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0+1 = 1 +0 =1  S=1, C= 0
1+1 = 10  S=0, C=1
1+1+1 = 11 S=1, C=1
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Implementation of Half-Adder

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Limitations of Half Adder:
oThe reason it’s called half adder is that there is no
scope to add the carry bit from previous bit. This
is a major limitation of half adders
when used as binary adders especially in real time
scenarios which involves addition of multiple bits.
oTo overcome this limitation, full adders are
developed.

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Full Adder:
o A full-adder is a combinational circuit that performs
the arithmetic sum of three input bits .

Block Diagram of Full Adder

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o
Logic Diagram of Full Adder
o The full adder can be thought of as two half adders
connected together, with the first half adder passing its carry
to the second
half adder.

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o Truth Table for Full Adder is:

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o The Boolean Expression for a full adder is: in
Sum = (A⊕B) ⊕C

C-Out = A.B + Cin(A⊕B) = AB+ACin+BCin

AB+AC in+BCin
= AB + AC in+BCin(A+A`)
= ABC in+AB+ACin+A`BCin
= AB(1+C in)+ACin+A`BCin
= AB+AC in+A`BCin
=AB+AC in(B+B`)+A`BCin
=ABC in+AB+AB`Cin+A`BCin
=AB(1+C in)+AB`Cin+A`BCin
=AB+AB`C in+A`BCin
=AB+C in(AB`+A`B) = AB+Cin(A⊕B)
 Simplified Expressions

S = x’y’z + x’yz’ + xy’z’ + xyz

C = xy + xz + yz
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Full adder implemented in SOP

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 Another implementation
• Full-adder can also implemented with two half adders and
one OR gate
• S = z ⊕ (x ⊕ y)
= z’(xy’ + x’y) + z(xy’ + x’y)’
= xy’z’ + x’yz’ + xyz + x’y’z
C = z(xy’ + x’y) + xy = xy’z + x’yz + xy

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 Demultiplexer

• A decoder with an enable input is referred to as a

decoder/demultiplexer.
• The truth table of demultiplexer
A B
is the same with
decoder.

D0

Demultiplexer D1
E
D2
D3
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 4-10. Multiplexers
S = 0, Y = I0 Truth Table S Y Y = S’I0 + SI1
S = 1, Y = I1 0 I0
1 I1

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4-to-1 Line Multiplexer

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