Computer Organization and

Architecture(KCS 302)
Binary Addition using signed 1’s and
2’s complement form
 Binary Addition using 1’s Complement

• A. Addition of a positive and a negative

binary number
• Case I: When the positive number has greater
magnitude.
• In this case addition of numbers is performed
after taking 1’s complement of the negative
number and the end-around carry of the sum
is added to the least significant bit.
 Example
• The following examples will illustrate this method in binary addition using 1’s complement:

• 1. Find the sum of the following binary numbers:

• (i) + 1110 and - 1101

• Solution:
• +1110 ⇒ 01110

-1101 ⇒ 10010 (taking 1’s complement)

00000

1 carry

00001

• Hence the required sum is + 0001.

 Example
• (ii) + 1101 and - 1011
• (Assume that the representation is in a signed 5-bit register).
• Solution:
• +1101 ⇒ 01101

-1011 ⇒ 10100 (taking 1’s complement)

00001

1 carry

00010
Hence the required sum is + 0010.
• Case II: When the negative number has
greater magnitude.
• In this case the addition is carried in the same
way as in case 1 but there will be non end-
around carry. The sum is obtained by taking
1’s complement of the magnitude bits of the
result and it will be negative.
 Example
• The following examples will illustrate this method in binary
addition using 1’s complement:
• Find the sum of the following binary numbers represented in
a sign-plus-magnitude 5-bit register:
• (i) + 1010 and - 1100
• Solution:
• +1010 ⇒ 01010

-1100 ⇒ 10011 (1’s complement)

11101
Hence the required sum is – 0010.
• (ii) + 0011 and - 1101.
• Solution:
• +0011 ⇒ 00011

-1101 ⇒ 10010 (1’s complement)

10101
Hence the required sum is – 1010.
• When the two numbers are negative
• For the addition of two negative numbers 1’s
complements of both the numbers are to be
taken and then added. In this case an end-around
carry will always appear. This along with a carry
from the MSB (i.e. the 4th bit in the case of sign-
plus-magnitude 5-bit register) will generate a 1 in
the sign bit. 1’s complement of the magnitude bits
of the result of addition will give the final sum.
 Example
• The following examples will illustrate this method in binary addition using 1’s complement:
• Find the sum of the following negative numbers represented in a sign-plus-magnitude 5-bit
register:
• (i) -1010 and -0101
• Solution:
• - 1 0 1 0 ⇒ 1 0 1 0 1 (1’s complement)

-0101 ⇒ 11010 (1’s complement)

01111

1 carry

10000

• 1’s complement of the magnitude bits of sum is 1111 and the sign bit is 1.
• Hence the required sum is -1111.
 Example
• (ii) -0110 and -0111.
• Solution:
• -0110 ⇒ 11001 (1’s complement)

-0111 ⇒ 11000 (1’s complement)

10001

1 carry

10010

• 1’s complement of 0010 is 1101 and the sign bit is 1.

• Hence the required sum is - 1101.
 Example
• (-9)+(-6)
• -9=1 1001 1 0110 (1’s complement)
• -6=1 0110 1 1001 (1’s complement)
•
• 0 1111
• 1
• 1 0000
• 1’s complement of 0000 is 1111 and the sign bit is 1.
• Hence the required sum is –(1111) or 1 1111
 Binary Addition using 2’s Complement
• A. Addition of a positive number and a negative
number.
• We consider the following cases.
• Case I: When the positive number has a greater
magnitude
• In this case the carry which will be generated is
discarded and the final result is the result of
addition.
 Example
• In a 5-bit register find the sum of the following by using
2’s complement:
• (i) +1011 and -0101
• Solution:
• +1011 ⇒ 01011

-0101 ⇒ 11011 (2’s

complement)

(Carry 1 discarded) 00110

Hence the sum is + 0110.
• (ii) + 0111 and – 0011.
• Solution:
• +0111 ⇒ 00111

-0011 ⇒ 11101

(Carry 1 discarded) 00100

Hence the sum is + 0100.

• Case II: When the negative number is greater.
• When the negative numbers is greater no
carry will be generated in the sign bit. The
result of addition will be negative and the final
result is obtained by taking 2’s complement of
the magnitude bits of the result.
 Example
• The following examples will illustrate this method in binary addition
using 2’s complement:
• In a 5-bit register find the sum of the following by using 2’s
complement:
• (i) + 0 0 1 1 and - 0 1 0 1
• Solution:
• +0011 ⇒ 00011

-0101 ⇒ 11011 (2’s complement)

11110

• 2’s complement of 1110 is (0001 + 0001) or 0010.

• (ii) + 0 1 0 0 and - 0 1 1 1
• Solution:
• +0100 ⇒ 00100

-0111 ⇒ 11001 (2’s complement)

11101

2’s complement of 1101 is 0011.

• Hence the required sum is – 0011.
• B. When the numbers are negative.
• When two negative numbers are added a
carry will be generated from the sign bit which
will be discarded. 2’s complement of the
magnitude bits of the operation will be the
final sum.
 Example
• In a 5-bit register find the sum of the following by using 2’s
complement:
• (i) – 0011 and – 0101
• Solution:
• -0011 ⇒ 11101 (2’s complement)

-0101 ⇒ 11011 (2’s complement)

(Carry 1 discarded) 11000

• 2’s complement of 1000 is (0111 + 0001) or 1000.

• Hence the required sum is – 1000.
 Example
• (ii) -0111 and – 0010.
• Solution:
• -0111 ⇒ 11001 (2’s complement)

-0010 ⇒ 11110 (2’s complement)

(Carry 1 discarded) 10111

• 2’s complement of 0111 is 1001.

• Hence the required sum is – 1001.