Download as pptx, pdf, or txt
Download as pptx, pdf, or txt
You are on page 1of 19

PRESENTATION ON ANALOG TO DIGITAL CONVERTER

SUBMITED TO : ROHIT SHRIVASTAV (DELD)

SUBMITEB BY

VYOMESH UPADHYAY MOHIT BUWADE

Floyd, Digital Fundamentals, 10th ed

2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

INTRODUCTION OF ANALOG TO DIGITAL CONVERTER DUAL SLOPE A/D CONVERTOR SUCCESSIVE APPROXIMATION A/D CONVERTOR

INTRODUTION
ADC = Analog-Digital-Converter Conversion of audio signals (mobile micro, digital music records, ...) Conversion of video signals (cameras, frame grabber, ...) Measured value acquisition (temperature, pressure, luminance, ...)
3

ADC - Scheme
Analog Digital

Sample & Hold Quantization fsample

Analog input can be voltage or current (in the following only voltage) Analog input can be positive or negative (in the following only positive)

Why ADC ?
Digital Signal Processing is more popular
Easy to implement, modify, Low cost

Data from real world are typically Analog Needs conversion system from raw measurements to digital data Consists of
Amplifier, Filter Sample and Hold Circuit, Multiplexer AD
5

ADC Architectures
Flash ADCs: High speed, but large area and high power dissipation. Suitable for low-medium resolution (6-10 bit). Sub-Ranging ADCs: Require exponentially fewer comparators than FlashADCs. Hence, they consume less silicon area and less power. Pipelined ADCs: Medium-high resolution with good speed. The trade-offs are latency and power. Successive Approximation ADCs: Moderate speed with mediumhigh resolution (8-14 bit). Compact implementation. Integrating ADCs or Ramp ADCs: Low speed but high resolution. Simple circuitry. Delta-Sigma based ADCs: Moderate bandwidth due to oversampling, but very high resolution thanks to oversampling and noise 6 shaping.

DUAL-SLOPE A/D CONVERTOR


1.Thedual-slopeADCintegratestheinputvoltageforafixedtime whilethecountercountston. 2.ControllogicswitchestotheVREF input. 3.Afixed-sloperampstartsfromVasthecountercounts.Whenit reaches0V,thecounteroutputislatched.
Vin + C R VREF 0 V A1 + +
Fixed interv Variable time al 0 0t = n counts Variable Variable voltage slope Fixed-slope V V ramp
I

I
SW

CLK

-V

A2

HIGH
R n

Counter

Control logic

Latches EN

D7 D6 D5 D4 D3 D2 D1 D0

Floyd, Digital Fundamentals,

10th

ed

2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Operation 0 vi dt Integrate t Reset and 0 Vr dt integrate Thus T1vi ( AVG ) t2Vr t2 vi ( AVG ) Vr T 1
T1
2

Applications DPM(Digital Panel Meter), DMM(Digital Multimeter),

Low Speed If T1 = 60Hz, converter throughput rate < 30 samples/s Excellent Noise Rejection High frequency noise cancelled out by integration Proper T1 eliminates line noise Easy to obtain good resolution

ADVANTAGES

DISADVANTAGES

Input signal is averaged Greater noise immunity than other ADC types High accuracy

Slow

High precision external components required to achieve accuracy

SUCCESSIVE APPROXIMATIOIN A/D CONVERTOR


1. Starting with the MSB, each bit in the successive approximation register (SAR) is activated and tested by the digital-to-analog converter (DAC). V DAC 2. After each test, the DAC produces an output voltage D that represents the bit. D Parallel 3. The comparator binary Comparator D output compares this voltage with + Input D the input signal. If the input signal (MSB) (LSB) D Serialb is larger, the bit is retained; SAR inary C otherwise it is reset (0). output CLK The method is fast and has a fixed conversion time for all inputs.
out 0 1 2 3

Floyd, Digital Fundamentals, 10th ed

2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved

Successive Approximation ADC Circuit

A comparator and a DAC are used in the process. Much faster than the digital ramp ADC because it uses digital logic to converge on the value closest to the input voltage.

Most Commonly used in medium to high speed Converters Based on approximating the input signal with binary code and then successively revising this approximation until best approximation is achieved SAR(Successive Approximation Register) holds the current binary value
Chap 0 15

OUTPUT

ADVANTAGES

DISADVANTAGES

Capable of high speed and reliable Medium accuracy compared to other ADC types Good tradeoff between speed and cost Capable of outputting the binary number in serial (one bit at a time)

Higher resolution successive approximation ADCs will be slower

Speed limited to ~5Msps

You might also like